Patents Assigned to PATTERSON + SHERIDAN LLP
  • Patent number: 10381454
    Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor with high capacitance and low leakage as well as a good interface control for thin film transistor (TFT) applications. In one embodiment, a thin film transistor structure includes a capacitor formed in a thin film transistor device. The capacitor further includes a common electrode disposed on a substrate, a dielectric layer formed on the common electrode and a pixel electrode formed on the dielectric layer. An interface protection layer formed between the common electrode and the dielectric layer, or between the dielectric layer and the pixel electrode. A gate insulating layer fabricated by a high-k material may also be utilized in the thin film transistor structure.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: August 13, 2019
    Assignee: PATTERSON + SHERIDAN LLP
    Inventors: Xuena Zhang, Dong-Kil Yim, Wenqing Dai, Harvey You, Tae Kyung Won, Hsiao-Lin Yang, Wan-Yu Lin, Yun-chu Tsai
  • Patent number: D913063
    Type: Grant
    Filed: January 1, 2018
    Date of Patent: March 16, 2021
    Assignee: Patterson + Sheridan, LLP
    Inventor: Keith Taboada