Abstract: The present invention provides in one aspect a method of defining a logic cell library composed of complex functions and simple functions, with some of the complex functions obtained from identifying logic function patterns. In another aspect the present invention provides a method of designing a representation of an integrated circuit that uses complex functions and simple functions, with the complex functions including a plurality of non-standard complex Boolean logic functions that are determined to collectively provide for logic pattern minimization.
Type:
Grant
Filed:
January 3, 2007
Date of Patent:
August 24, 2010
Assignee:
PDF Acquisition Corp
Inventors:
Dipti Motiani, Veerbhan Kheterpal, Lawrence T. Pileggi