Abstract: Disclosed is a three-dimensional flash memory including a back gate, which includes word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked, and strings penetrating the word lines and extended and formed in one direction on the substrate. Each of the strings includes a channel layer extended and formed in the one direction, and a charge storage layer extended and formed in the one direction to surround the channel layer, the channel layer and the charge storage layer constitute memory cells corresponding to the word lines, and the channel layer includes a back gate extended and formed in the one direction, with at least a portion of the back gate surrounded by the channel layer, and an insulating layer extended and formed in one direction between the back gate and the channel layer.
Type:
Grant
Filed:
June 22, 2021
Date of Patent:
June 27, 2023
Assignees:
IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY), PeDiSem Co., Ltd.
Abstract: Disclosed are a three-dimensional flash memory aimed at integration, and a method for manufacturing same. According to an embodiment, a three-dimensional flash memory comprises: multiple memory cell strings formed on a substrate so as to extend in a direction, each of the multiple memory cell strings comprising a channel layer and an electric charge storage layer surrounding the channel layer; multiple word lines connected perpendicularly to the multiple memory cell strings; and at least one intermediate wire layer formed at an intermediate point with regard to the direction in which the multiple memory cell strings are formed to extend, the at least one intermediate wire layer being selectively available as a source electrode or as a drain electrode with regard to each of the multiple memory cell strings.
Type:
Application
Filed:
June 26, 2020
Publication date:
October 6, 2022
Applicants:
Industry-University Cooperation Foundation Hanyang University (IUCF-HYU), PeDiSem Co. Ltd.
Abstract: Disclosed is a three-dimensional flash memory including a back gate, which includes word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked, and strings penetrating the word lines and extended and formed in one direction on the substrate. Each of the strings includes a channel layer extended and formed in the one direction, and a charge storage layer extended and formed in the one direction to surround the channel layer, the channel layer and the charge storage layer constitute memory cells corresponding to the word lines, and the channel layer includes a back gate extended and formed in the one direction, with at least a portion of the back gate surrounded by the channel layer, and an insulating layer extended and formed in one direction between the back gate and the channel layer.
Type:
Application
Filed:
June 22, 2021
Publication date:
December 23, 2021
Applicants:
IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY, PeDiSem Co., Ltd.