Patents Assigned to Peking University Shenzhen Graduate School
  • Publication number: 20170097650
    Abstract: An adaptive voltage source, comprising a signal output end, and a reference resistance forming circuit and a sensing module connected in series between a voltage source and a low power level; the sensing module comprises a sensing end coupled to a transistor to be sensed to sense the threshold voltage drift of the transistor to be sensed in a device circuit; the equivalent resistance of the sensing module increases with the increase of the sensed threshold voltage drift; and the signal output end is coupled to a first node coupled to the reference resistance forming circuit and the sensing module, and is used to output adaptive voltage. The output adaptive voltage is adjusted via the threshold voltage drift sensed by the sensing module. Based on the circuit, also disclosed are a shift register and unit thereof, and display.
    Type: Application
    Filed: November 14, 2014
    Publication date: April 6, 2017
    Applicant: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Shengdong ZHANG, Congwei LIAO, Zhijin HU, Wenjie LI, Junmei LI
  • Publication number: 20170074722
    Abstract: An ultraviolet light sensing circuit and sensing system. The ultraviolet light sensing circuit comprises a modulation unit and a phase delay unit, wherein the modulation unit comprises a first stage of inverter which is used for sensing ultraviolet light and is used as a voltage feedback modulation stage; and the phase delay unit comprises N stages of inverters which are connected in sequence, where N is an even number which is greater than or equal to 2. The modulation unit is connected to the phase delay unit in sequence, and the output voltage of the phase delay unit is fed to the modulation unit; and the modulation unit is modulated by a control signal which is a pulse signal. The ultraviolet light sensing circuit and sensing system can be used for ultraviolet light information communications. The ultraviolet light sensing circuit can sense ultraviolet light signals and output amplitude modulation wave signals.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 16, 2017
    Applicant: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Shengdong ZHANG, Congwei LIAO, Zhijin HU, Wenjie LI, Junmei LI
  • Patent number: 9584824
    Abstract: A motion vector estimation method in video encoding: First, a feature point is detected in a video frame. Next, motion estimation is performed on the feature point to obtain a motion vector of the feature point. Next, the feature point is mapped to a feature image block, and the motion vector of the feature point is used as an initial motion vector of the feature image block. Finally, a distance between each image block and the feature image block is calculated, motion estimation is performed on the image blocks in an ascending order of the distances between the image blocks and the feature image block, and an obtained motion vector of an image block is used as an initial motion vector of an image block that is adjacent to the image block and has not undergone motion estimation, until motion estimation is completed for the image blocks in the entire video frame.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: February 28, 2017
    Assignee: Peking University Shenzhen Graduate School
    Inventors: Ronggang Wang, Chengzhou Tang, Wen Gao
  • Patent number: 9553956
    Abstract: Embodiments of the invention relate to a self-adaptive network control transmission method and system based on TCP. By creating network coding layer between transmission layer and IP layer on both the sending and receiving nodes, we can add network-coding headers which contains specific variables in the coding packets and ACK packets, transmit and refresh those variables through network-coding packets and ACK packets, and adjust redundancy factor R according to the variables. This method can strengthen the resistance to burst loss and maintain the redundancy factor R at the optimum value, thus raise the network throughputs.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: January 24, 2017
    Assignee: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Hui Li, Sicong Song, Kai Pan, Shuoyan Li, Xudong Fan, Ruiyuan Li
  • Publication number: 20160197145
    Abstract: A tunneling field effect transistor, comprising a gate electrode layer, a gate dielectric layer, a source region, a connected region and a drain region, wherein the source region comprises a first source region and a second source region, the second source region comprising an inner layer source region and an outer layer source region. The connected region comprises an expansion region and a high-resistance region. The doping types of materials of the inner layer source and the outer layer source region are opposite, and the forbidden bandwidth of the material of the inner layer source region is less than that of the outer layer source region. The contact surface formed by way of covering the inner layer source region by the outer layer source region is a curved surface.
    Type: Application
    Filed: September 1, 2014
    Publication date: July 7, 2016
    Applicant: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Haijun LOU, Xinnan LIN, Dan LI, Jin HE
  • Publication number: 20160006463
    Abstract: This invention gives a coding method of MBR (Minimum Bandwidth Regenerating) codes. The related method includes the following steps: equally divide the original file of size B into k(k+1)/2 blocks, obtaining the first packets; construct a symmetrical k×k system matrix S with these first packets; generate k ID codes, wherein each ID code contains k elements; obtain the coded packet through operations between one column of the system matrix and the ID code; repeat the above steps with (n?k) different columns of the system matrix separately to get the (n?k) coded packets; construct the (n?k)×k check matrix P with the column number g which is the serial number of the ID codes in the coded packet set Pg; store the rows of the system matrix and coded matrix to n nodes, each node stores one row. The present invention also involves a method to repair the failed nodes of the above coding scheme.
    Type: Application
    Filed: March 26, 2013
    Publication date: January 7, 2016
    Applicants: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Hui LI, Hanxu HOU, Bing ZHU
  • Publication number: 20150358037
    Abstract: The invention relates to a method for encoding MSR (Minimum-storage Regenerating) codes, which comprises the following steps of: acquiring n first data packets which are represented by Si, i=1, 2, . . . , n; setting n storage nodes and a positive integer k, wherein n=2K; respectively adding a specified number of 0 bits on data heads or data tails of subsequent successive k first data packets by taking the next first data packet of the ith first data packet as a starting point, acquiring k second data packets, and acquiring an encoded data packet by computing the k second data packets; repeating the above steps and acquiring n encoded data packets which are represented by Pi, i=1, 2, . . . , n; and storing the ith first data packet and the encoded data packet acquired by taking the next first data packet of the first data packet as the starting point into the ith storage node.
    Type: Application
    Filed: February 26, 2013
    Publication date: December 10, 2015
    Applicants: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Hui LI, Hanxu HOU, Bing ZHU
  • Patent number: 9150522
    Abstract: Disclosed is a compound of (aminophenylamino) pyrimidyl benzamides and a synthesis method thereof. The compound has Btk-inhibition activity and can be used to treat autoimmune diseases, heteroimmune diseases, cancers or thromboembolic diseases.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: October 6, 2015
    Assignees: Peking University Shenzhen Graduate School, Beijing Reciprocapharmaceuticals Co. Ltd.
    Inventors: Zhengying Pan, Xitao Li
  • Patent number: 9129992
    Abstract: Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: September 8, 2015
    Assignee: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Shengdong Zhang, Xin He, Longyan Wang
  • Patent number: 9058986
    Abstract: Designs and fabrication of a FinFET are provided. In one implementation, the fabrication can include forming a dielectric stripe on a substrate; implanting ions to the substrate by using the dielectric stripe as a mask so as to convert a surface layer of the substrate to an amorphous layer; forming an amorphous semiconductor layer on the substrate covering the dielectric stripe and recrystallizing each of the amorphous layer and the amorphous semiconductor layer to be a monocrystalline layer; processing regions beside two ends of the dielectric stripe to form a protective layer, the regions being predesigned as source and drain regions; forming recrystallized semiconductor spacers at two sides of the dielectric stripe uncovered by the protective layer, and forming recrystallized semiconductor blocks on regions covered by the protective layer; removing the dielectric stripe between the spacers so that the spacers can be formed as Fin bodies.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: June 16, 2015
    Assignee: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Shengdong Zhang, Ruqi Han, Dedong Han
  • Publication number: 20150131728
    Abstract: A motion vector estimation method in video encoding: First, a feature point is detected in a video frame. Next, motion estimation is performed on the feature point to obtain a motion vector of the feature point. Next, the feature point is mapped to a feature image block, and the motion vector of the feature point is used as an initial motion vector of the feature image block. Finally, a distance between each image block and the feature image block is calculated, motion estimation is performed on the image blocks in an ascending order of the distances between the image blocks and the feature image block, and an obtained motion vector of an image block is used as an initial motion vector of an image block that is adjacent to the image block and has not undergone motion estimation, until motion estimation is completed for the image blocks in the entire video frame.
    Type: Application
    Filed: June 25, 2013
    Publication date: May 14, 2015
    Applicant: Peking University Shenzhen Graduate School
    Inventors: Ronggang Wang, Chengzhou Tang, Wen Gao
  • Patent number: 8956926
    Abstract: Disclosed is a method for manufacturing a self-aligned metal oxide thin film transistor. According to the present invention, a metal oxide semiconductor layer having a high carrier concentration is formed, and then a channel region which is self-aligned with a gate electrode is oxidized by a plasma having oxidbillity so that the channel region has a low carrier concentration and the source and drain regions have high carrier concentrations while the resulting transistor has a self-aligned structure. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: February 17, 2015
    Assignee: Peking University Shenzhen Graduate School
    Inventors: Shengdong Zhang, Xin He, Yi Wang, Dedong Han, Jeng Han
  • Publication number: 20140357841
    Abstract: A method for stabilizing an alpha helix of a polypeptide includes steps of: (1) connecting an unnatural amino acid to an amino terminus of the polypeptide and end-capping via an acetylation; (2) processing a product of the step (1) with a thiolene reaction and obtaining a polypeptide compound having a modification of thioether side chains; (3) oxidizing the polypeptide compound having the modification of the thioether side chains, and obtaining a polypeptide compound having a modification of R-configured sulfoxide side chains or S-configured sulfoxide side chains; (4) separating and purifying a product of the step (3), and obtaining the modification of the R-configured sulfoxide side chains. CD diagrams show that, via chiral sulfoxide side chains, the method has good performance on stabilizing the alpha helix of the polypeptide and good tolerance to a polypeptide sequence.
    Type: Application
    Filed: January 26, 2014
    Publication date: December 4, 2014
    Applicant: Peking University Shenzhen Graduate School
    Inventors: Zigang Li, Qingzhou Zhang
  • Patent number: 8902887
    Abstract: This invention provides a load-balancing structure for packet switches and its constructing method. In this method, the structure based on self-routing concentrators is divided into two stages, that is, a first stage and a second stage fabric. A virtual output group queue (VOGQ) is appended to each input group port of the first stage fabric, and a reordering buffer (RB) is configured behind each output group port of the second stage fabric. Packets stored in the VOGQ are combined into data blocks with preset length, which is divided into data slices of fixed size, finally each data slice is added an address tag and is delivered to the first stage fabric for self-routing. Once reaching the RB, data slices are recombined into data blocks. This invention solves the packet out-of-sequence problem in the load-balancing Birkhoff-von Neumann switching structure and improves the end-to-end throughput.
    Type: Grant
    Filed: October 31, 2009
    Date of Patent: December 2, 2014
    Assignees: Peking University Shenzhen Graduate School, Shanghai Research Institute of Microelectronics (Shrime), Peking University
    Inventors: Hui Li, Wei He, Shuoyan Li, Jiaqing Huang, Jian Chen, Kai Pan, Shuxin Zhang, Peng Yi, Binqiang Wang
  • Patent number: 8766958
    Abstract: A gate driving circuit unit, a gate driving circuit and a display device are disclosed. The gate driving circuit unit comprises: a first clock signal control module, an input signal control module, a third clock signal control module and a fourth clock signal control module, wherein the first clock signal control module comprises a driving unit and a clock feed-through suppressing unit. The driving unit transmits a first clock signal to an output port after being switched on. The clock feed-through suppressing unit couples the control end of the driving unit to a signal output interface under control of the first clock signal. The input signal control module provides the driving voltage for the driving unit under control of an input pulse signal. The third clock signal control module provides the shutdown voltage for the driving unit.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: July 1, 2014
    Assignee: Peking University Shenzhen Graduate School
    Inventors: Shengdong Zhang, Congwei Liao, Changde He, Wenjun Dai
  • Publication number: 20140065779
    Abstract: Designs and fabrication of a FinFET are provided. In one implementation, the fabrication can include forming a dielectric stripe on a substrate; implanting ions to the substrate by using the dielectric stripe as a mask so as to convert a surface layer of the substrate to an amorphous layer; forming an amorphous semiconductor layer on the substrate covering the dielectric stripe and recrystallizing each of the amorphous layer and the amorphous semiconductor layer to be a monocrystalline layer; processing regions beside two ends of the dielectric stripe to form a protective layer, the regions being predesigned as source and drain regions; forming recrystallized semiconductor spacers at two sides of the dielectric stripe uncovered by the protective layer, and forming recrystallized semiconductor blocks on regions covered by the protective layer; removing the dielectric stripe between the spacers so that the spacers can be formed as Fin bodies.
    Type: Application
    Filed: June 13, 2011
    Publication date: March 6, 2014
    Applicant: Peking University Shenzhen Graduate School
    Inventors: Shengdong Zhang, Ruqi Han, Dedong Han
  • Publication number: 20140011329
    Abstract: Disclosed is a method for manufacturing a self-aligned metal oxide thin film transistor. According to the present invention, a metal oxide semiconductor layer having a high carrier concentration is formed, and then a channel region which is self-aligned with a gate electrode is oxidized by a plasma having oxidbillity so that the channel region has a low carrier concentration and the source and drain regions have high carrier concentrations while the resulting transistor has a self-aligned structure. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.
    Type: Application
    Filed: June 13, 2011
    Publication date: January 9, 2014
    Applicant: Peking University Shenzhen Graduate School
    Inventors: Shengdong Zhang, Xin He, Yi Wang, Dedong Han, Ruqi Han
  • Publication number: 20130309808
    Abstract: Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.
    Type: Application
    Filed: June 10, 2011
    Publication date: November 21, 2013
    Applicant: PEKING UNIVERSITY SHENZHEN GRADUATE SCHOOL
    Inventors: Shengdong Zhang, Xin He, Longyan Wang
  • Publication number: 20130122649
    Abstract: Disclosed is a method for manufacturing a metal oxide thin film transistor. According to the method, an active layer having a high carrier concentration is formed, and then a channel region is oxidized by plasma having oxidbillity so that the channel region has a low carrier concentration while a source region and a drain region have high carrier concentrations. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.
    Type: Application
    Filed: June 13, 2011
    Publication date: May 16, 2013
    Applicant: Peking University Shenzhen Graduate School
    Inventors: Shengdong Zhang, Xin He, Yi Wang, Dedong Han, Ruqi Han
  • Patent number: 8242142
    Abstract: Compounds having the formula I, their methods of synthesis, and pharmaceutically acceptable salts of certain of them are provided in which the variables have the definitions described herein. Compositions including the compounds having the formula I-A in which the variables have the definitions described herein, and methods of using the compositions for the treatment of certain diseases mediated by the up-regulation of Smo are also disclosed.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: August 14, 2012
    Assignees: The Regents of the University of California, Peking University Shenzhen Graduate School
    Inventors: Shuo Lin, Zhen Yang