Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.

Abstract: A cap chip or high density reroute layer for use in a stacked microelectronic module. A first set of electrically conductive reroute layers are defined on a sacrificial substrate. One or more stud bump columns are defined on an exposed conducive pad on a conductive reroute layer. One or more active or passive electronic elements, or both may be electrically coupled to one or more exposed conductive pads. The layer is encapsulated in an encapsulant and the stud bump columns exposed by removing a portion of the encapsulant. A second set of electrically conductive reroute layers is defined on the layer and electrically coupled to the stud bumps. The sacrificial substrate is removed to provide a cap chip or reroute layer.

Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.

Abstract: A multilayer electronic imaging module and sensor system incorporating a micro-lens layer for imaging and collimating a received image from a field of regard, a photocathode layer for detecting photons from the micro-lens layer and generating an electron output, a micro-channel plate layer for receiving the output electrons emitted from the photocathode in response to the photon input and amplifying same and stacked readout circuitry for processing the electron output of the micro-channel plate. The sensor system of the invention may be provided in the form of a Cassegrain telescope assembly and includes electromagnetic imaging and scanning means and beam-splitting means for directed predetermined ranges of the received image to one or more photo-detector elements which may be in the form of the micro-channel imaging module of the invention.

Abstract: A multilayer electronic imaging module and sensor system incorporating a micro-lens layer for imaging and collimating a received image from a field of regard, a photocathode layer for detecting photons from the micro-lens layer and generating an electron output, a micro-channel plate layer for receiving the output electrons emitted from the photocathode in response to the photon input and amplifying same and stacked readout circuitry for processing the electron output of the micro-channel plate. The sensor system of the invention may be provided in the form of a Cassegrain telescope assembly and includes electromagnetic imaging and scanning means and beam-splitting means for directed predetermined ranges of the received image to one or more photo-detector elements which may be in the form of the micro-channel imaging module of the invention.

Abstract: A memory device such as a solid state memory device have a dual-hardware, secure erase feature. A memory controller operating in a memory controller domain provides general memory management and interface operons. Upon receipt of a trigger signal which may be received from a secure supervisor circuit, a separate processor element that is configured to directly access the raw memory cells in the device bypasses the memory controller domain and executes a separately provided secure erase operating system whereby the raw cell data may be erased and rewritten with a predetermined data pattern and whereby the erase operation at the raw cell level may be verified and reported to the user by the processor.

Abstract: A targeting sight having viewing optics, a focal plane array and an alignment frame having an aperture that defines a target area that is mounted proximal the muzzle of a weapon. Electronic processing means is provided to define a crosshair in the viewing optics. The alignment frame is illuminated with a beam and the reflected portion of the beam is received by the focal plane array and is processed to position the crosshair with respect to the aperture.