Patents Assigned to Phase Matrix, Inc.
  • Patent number: 8373463
    Abstract: A phase-locked loop (PLL) frequency synthesizer includes a phase detector, a low pass filter coupled to the phase detector, an amplifier coupled to the low pass filter, a voltage controlled oscillator (VCO) coupled to the amplifier, a power splitter coupled to the VCO, and a switch configured to select between a first branch and a second branch through which to couple the power splitter to the phase detector. The first branch includes a frequency divider while the second branch includes a mixer. The PLL frequency synthesizer also includes a frequency accuracy indicator that compares a frequency in the first branch with a frequency generated in the second branch, and confirms that the PLL frequency synthesizer is locked to a desired frequency upon receiving a phase lock signal, if the frequency generated in the first branch is the same as the frequency generated in the second branch.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 12, 2013
    Assignee: Phase Matrix, Inc.
    Inventor: Oleksandr Chenakin
  • Patent number: 8324952
    Abstract: A time interpolator circuit increases the accuracy of digital counting circuits.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: December 4, 2012
    Assignee: Phase Matrix, Inc.
    Inventor: Lewis W Masters
  • Publication number: 20120294343
    Abstract: A vector RF modulation system includes a sampling receiver that monitors modulator RF output and provides IF signals for a processor that calculates modulator calibration parameters.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: Phase Matrix, Inc.
    Inventors: Andrew M. Teetzel, Panagiotis Pete Pragastis, Charanbir S. Mahal
  • Publication number: 20120281806
    Abstract: A time interpolator circuit increases the accuracy of digital counting circuits.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 8, 2012
    Applicant: Phase Matrix, Inc.
    Inventor: Lewis W. Masters
  • Patent number: 7701299
    Abstract: A low phase noise PLL synthesizer is described in which an initial tuning mechanism uses a conventional divider loop to lock a VCO to a desired output frequency. Once initial lock is achieved, the divider loop is switched out of the circuit in favor of a low phase noise mixer loop. The local oscillator signal for the mixer is derived from the same low phase noise source as the phase comparison frequency.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: April 20, 2010
    Assignee: Phase Matrix, Inc.
    Inventor: Oleksandr Chenakin
  • Publication number: 20090309665
    Abstract: A low phase noise PLL synthesizer is described in which an initial tuning mechanism uses a conventional divider loop to lock a VCO to a desired output frequency. Once initial lock is achieved, the divider loop is switched out of the circuit in favor of a low phase noise mixer loop. The local oscillator signal for the mixer is derived from the same low phase noise source as the phase comparison frequency.
    Type: Application
    Filed: September 5, 2008
    Publication date: December 17, 2009
    Applicant: Phase Matrix, Inc.
    Inventor: Oleksandr Chenakin