Abstract: An apparatus for chemical-mechanical planarization (CMP) of semiconductor wafers that allows independent micro-control of each spindle for tailored CMP performance. The present invention provides, in one embodiment, a CMP tool that includes a stationary bridge that houses a rack and pinion assembly. The rack and pinion assembly is coupled to a plurality of motor assemblies each of which is coupled to rotate a spindle. Significantly, movements of the spindles across are individually and independently controlled by the rack and pinion assembly. An advantage of the present independent spindle motion design allows optimization of the CMP process for each spindle and enables more accurate prediction of the effect of translation on CMP performance. Independent rotation and downforce capability of the present invention provides additional flexibility in terms of tuning polish rates and uniformity. Another advantage of the present invention is that a more compact enclosure for wafer isolation can be achieved.

Abstract: The system and method facilitates the transmission of relatively high voltage signals via a thin oxide gate CMOS device without an excessively detrimental electric field build up across the thin oxide layers forming a gate in a CMOS device. The high voltage CMOS thin oxide gate system and method provides a degradation repression bias voltage signal to the thin oxide gate of the CMOS device. The degradation repression bias voltage signal establishes a differential voltage potential between the source and drain components of the thin oxide gate output CMOS device and the gate component of the thin oxide gate output CMOS device. The degradation repression bias voltage signal is maintained at a level that prevents that excessively detrimental electric field stresses are not induced in oxide layers that form the thin oxide gate in the output CMOS device.

Abstract: An apparatus and method thereof for sampling multipath signal data in a receiver. The apparatus includes a plurality of demodulators coupled in parallel, each of the plurality of demodulators receiving digital baseband signal data and demodulating the digital baseband signal data, a controller coupled to the plurality of demodulators, and a timer coupled to the controller. The timer generates a controller interrupt at a specified frequency. The controller interrupt causes the controller to sample demodulated signal data from the plurality of demodulators. The specified frequency is greater than the symbol rate.

Abstract: A low frequency to high frequency power converter having a power feedback network from a high frequency voltage source to the low frequency input to a DC supply circuit for the high frequency voltage source. The network forms part of a feedback path which has an inductive impedance at one or more frequencies within the operational range of the high frequency source. In a fluorescent lamp ballast embodiment, feedback is from a load connection point through a path having at least an inductor and a capacitor in series. A low pass filter input to the DC supply circuit may have a shunt capacitor across the rectifier input. The feedback network may include a capacitor in series with the parallel combination of an inductor and a capacitor. In another embodiment the feedback inductor is a tapped inductor connected to the rectifier input, its two inductor portions having mutually exclusive periods of zero current flow.

Abstract: The present invention is directed to an SOI LDMOS device having improved current handling capability, particularly in the source-follower mode, while maintaining an improved breakdown voltage capability. The improvement in current handling capability is achieved in a first embodiment by introducing an offset region between the source and thin drift regions. The offset region achieves an offset between the onset of the linear doping profile and the thinning of the SOI layer that results in the thin drift region. In a second embodiment a further increase in the current handling capability of an SOI device is achieved by fabricating an oxide layer over the offset region, with the thickness of the oxide layer layer varying up to about half the thickness of the oxide layer fabricated over the thin drift region.

Abstract: A microcontroller with selectable function external pins. Program controllable configuration registers control pin function selection through multiplexers which select between data/address lines and special function unit output lines and which control line drivers which are disabled when the pins are used as input pins.

Abstract: A contact to a silicon semiconductor body is fabricated in a manner which merges the benefits of the low contact resistance provided by titanium silicide or cobalt silicide and the good step coverage provided by selective chemical vapor deposition (CVD) of tungsten or molybdenum from tungsten hexafluoride or molybdenum hexafluoride. An intermediate adhesion layer of molybdenum silicide or tungsten silicide is formed by physical vapor deposition, e.g., sputtering or vacuum evaporation, of molybdenum or titanium, followed by annealing. Such adhesion layer protects the underlying layer against damage by fluorine during CVD of the overlying layer of tungsten or molybdenum, as well as providing low resistance and good adhesion to both the underlying and overlying layers.

Abstract: A focussing lens for an electron beam device is formed by a helically coiled resistance layer of a fired suspension of a conductive material of a mixture of a lead rathenate, a lead titanate and a ruthenium oxide in a glass formed of silicon dioxide, aluminum oxide and lead oxide.