Abstract: This invention relates to methods and apparatus for equalizer adaptation for compensating for channel distortion on received data signals. The method comprises, for each bit, forming an adjusted bit signal comprising a weighted contribution from at least one other bit period. The polarity of the adjusted bit signal is determined and the bit is categorized as a hard, i.e. high confidence, bit is the bit is above an upper threshold or below a lower threshold or otherwise is categorized as a soft bit. The weightings are adjusted based on the category of the bit wherein a first adjustment is made it the bit is categorized as a soft bit but a second, different adjustment is made if the bit is categorized as a hard bit. For a soft bit the weightings may be increased for bits which have the same polarity as the bit in question and decreased for bits of opposite polarity.

Abstract: A system is disclosed for an improved ROSA that has increased sensitivity for permitting greater numbers of ONTs to be connected to an optical network per defined transmission line distances. The ROSA configuration includes a digital optical module with improved performance characteristics. This digital optical module has replaced a conventional photodiode with a PIN detector that is coupled with the TIA. The resulting digital optical module containing this PIN/TIA configuration when incorporated in a ROSA provides a single ROSA solution that will meet or exceed the ITU/IEEE FTTx standards for short and long distances under substantially all operating conditions.

Abstract: The application describes digital receivers and operation thereof with improved recovery of a received signal. A clock generator (201) generates a clock signal, for example from the received signal. The clock signal (2) is used for sampling the received signal by comparator (205) which compares the received signal to a reference. A phase shifter (203) adjusts the phase of the first clock signal and a controller (202, 204, 206) adjust the phase of the clock signal to maximize the vertical eye opening of the signal at the sampling time. The phase of the clock signal may be adjusted in a first direction and a measure of vertical eye opening of the signal compared to a previous measure. If the measure of vertical eye opening has increased the signal another phase adjustment may be made in the same direction whereas if the vertical eye opening of the signal has decreased a further phase adjustment in the opposite direction may be made.

Abstract: This invention relates to methods and apparatus for equalizer adaptation for compensating for channel distortion on received data signals. The method comprises, for each bit, forming an adjusted bit signal comprising a weighted contribution from at least one other bit period. The polarity of the adjusted bit signal is determined and the bit is categorized as a hard, i.e. high confidence, bit is the bit is above an upper threshold or below a lower threshold or otherwise is categorized as a soft bit. The weightings are adjusted based on the category of the bit wherein a first adjustment is made it the bit is categorized as a soft bit but a second, different adjustment is made if the bit is categorized as a hard bit. For a soft bit the weightings may be increased for bits which have the same polarity as the bit in question and decreased for bits of opposite polarity.

Abstract: Methods and apparatus adapting equalizers for compensating for signal distortion of a received digital signal are disclosed. The method comprises deriving equalizer settings for a received signal, determining at least one signal parameter of said received signal; and storing the derived equalizer settings together with an indication of the signal parameter. The signal parameter could, for instance, comprise the data rate of the signal. If the signal parameter changes the equalizer is configured to use any stored settings which are appropriate for the new signal parameter. Thus, rather than start an entirely new equalizer adaptation routine every time the signal parameter changes the equalizer will use any stored settings which are appropriate for the changed parameter.

Abstract: A repeater includes at least an adaptive equalizer able to equalize a received signa. An adaptation function that determines the optimal equalizer settings based on the received signal is either integrated in the repeater or closely associated with the repeater. The repeater also has the capability to mute the output signal under control of the adaptation logic, while receiving an input signal which is used to perform the adaptation function.

Abstract: An integrated circuit product, for bidirectional communication, has two inputs and two outputs. The first input is located on a first edge of the integrated circuit product. The first output is located on a second edge of the integrated circuit product, the second edge being located adjacent to the first edge. The second input is located on a third edge of the integrated circuit product, the third edge being opposite the first edge. The second output is located on a fourth edge of the integrated circuit product, the fourth edge being opposite the second edge. The integrated circuit product can be mounted diagonally in a transceiver module, allowing straight signals paths from the inputs and outputs of the integrated circuit product to the corresponding inputs and outputs of the transceiver module.

Abstract: A decision feedback equalizer includes at least one quantizer, able to quantize a received signal according to a comparison with a one of multiple quantization thresholds. Each quantization threshold corresponds to one or more than one value of one or more than one previously received symbols. The equalizer further includes level selection circuitry, for setting the quantization thresholds based on statistical measurements taken in connection with signals having the corresponding value of one or more previously received signal.

Abstract: A method of equalizer adaptation involves comparing equalizer output values with a center threshold, and with at least one of a pair of outer thresholds, and adapting the equalizer in order to increase the degree of eye opening. The values of the outer thresholds are adapted such that a fixed proportion of equalizer output values lie between the outer thresholds, and the equalizer coefficients are adapted such the separation of the outer thresholds is increased. The equalizer coefficients are adapted on the basis of equalizer output values which lie between the pair of outer thresholds.

Abstract: An integrated circuit product, for bidirectional communication, has two inputs and two outputs. The first input is located on a first edge of the integrated circuit product. The first output is located on a second edge of the integrated circuit product, the second edge being located adjacent to the first edge. The second input is located on a third edge of the integrated circuit product, the third edge being opposite the first edge. The second output is located on a fourth edge of the integrated circuit product, the fourth edge being opposite the second edge. The integrated circuit product can be mounted diagonally in a transceiver module, allowing straight signals paths from the inputs and outputs of the integrated circuit product to the corresponding inputs and outputs of the transceiver module.

Abstract: An integrated circuit can operate in a first mode as a parallel-to-serial converter, and in a second mode as a serial-to-parallel converter. Some of the components of the integrated circuit are used in both modes. For example, the IC has a single parallel interface, which is used as a parallel input in the first mode, and as a parallel output in the second mode. Further, the IC includes a single phase-locked loop circuit, which is used in a clock multiplier unit in the first mode, and in a clock recovery circuit in the second mode.

Abstract: An encoder and an encoding method are suitable for use in an optical communication system. A concatenated coding scheme is used, in which the source data are encoded by means of an outer encoder to produce outer encoded data, and the outer encoded data are encoded by means of an inner encoder to produce inner encoded data, which are transmitted over a communications medium, such as an optical fibre. The inner encoder acts to produce inner encoded data in a format which occupies the space occupied one or more (for example, two) frames as defined in a standard, in this case the ITU-T G.709 standard. The inner encoder forms a product code from two sets of codewords, for example Extended Hamming codes. More particularly, at least one of the two sets of codewords is a shortened code, in order that the inner encoded data exactly occupies a plurality of frames as defined in the standard.

Abstract: An equalizer is divided between two tapped delay lines. One half of the sampled data is passed along one delay line, and the other half of the sampled data is passed along the other delay line. Delayed samples are passed to two summing circuits, and the output is formed from the two summing circuits alternately. This structure has the advantage that, by doubling the number of components, each component effectively only needs to operate at half the rate which would be required in a conventional structure. This allows the equalizer to operate successfully with signals at higher data rates.

Abstract: A switching circuit, for use in soft-decision Extended Hamming Code decoding, allows the detection of pairs of received bits having “low confidence” and whose position-ids SUM to the syndrome of the received code signal, when the occurrence of an even (and non-zero) number of errors is detected.

Abstract: A method is provided for determining a slice level in the quantizer of a receiver, by determining the proportions of received signal values which lie below and above specified values. These proportions, which correspond to points on a cumulative probability function, can be used with assumptions about the received signal distribution, to determine a desired slice level.

Abstract: An integrated circuit can operate in a first mode as a parallel-to-serial converter, and in a second mode as a serial-to-parallel converter. Some of the components of the integrated circuit are used in both modes. For example, the IC has a single parallel interface, which is used as a parallel input in the first mode, and as a parallel output in the second mode. Further, the IC includes a single phase-locked loop circuit, which is used in a clock multiplier unit in the first mode, and in a clock recovery circuit in the second mode.

Abstract: A clock recovery circuit includes a limiting amplifier to speed up transitions in input data. The resulting input data stream is supplied to a phase detector, which produces a modified input data stream, having data transitions corresponding to alternate input data transitions. The phase detector includes logic circuitry, for producing phase alignment pulses, whose duration is dependent on the time period from a modified data transition, which occurs while the clock signal takes the first value, until a clock signal transition from the second value to the first value. The phase detector also includes an output device, for comparing the duration of the phase alignment pulses with the duration of pulses in the clock signal.

Abstract: A method is disclosed for recovering a digital signal from an analog signal. A received analog signal value is compared with a centre threshold, and with at least one of a pair of outer thresholds, to form comparator output signals. Digital samples of the comparator output signals are formed using a recovered clock signal. The values of the outer thresholds are adapted such that a constant proportion of the digital samples represent received signal values lying between the outer thresholds, and the phase of the recovered clock signal is adapted such that the separation of the outer thresholds is maximised. Other receiver parameters can be adapted in the same way.

Abstract: A method of equalizer adaptation involves comparing equalizer output values with a centre threshold, and with at least one of a pair of outer thresholds, and adapting the equalizer in order to increase the degree of eye opening.

Abstract: There is disclosed a method of transferring data from a first device to a second device over parallel connections. The data represents a signal which has some known statistical property, and the data is encoded and distributed between the parallel connections, such that each parallel connection carries a respective time-aligned sequence of bits, and such that the known statistical property of the signal represented by the data is used to establish a known correlation between the respective sequences. In the second device, the known correlation between the respective sequences is used to re-establish time alignment of the received sequences.