Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a semiconductor chip in which a bonding pad is formed in a wafer state, a first passivation layer formed on the semiconductor chip to expose the bonding pad, a first re-distribution layer connected to the bonding pad and extending on the first passivation layer, a conductive bump disposed on an electrical signal path leading to the bonding pad, the first re-distribution layer, and a substrate, and a capacitor formed to be electrically connected to the first re-distribution layer at a wafer level before the conductive bump is formed.

Abstract: Disclosed herein is a semiconductor device including first and second capacitor structures formed to be spaced apart from each other on a semiconductor substrate, wherein the first capacitor structure includes a first trench formed in the semiconductor substrate, first, second, and third electrode layers disposed in the first trench, and first, second, and third dielectric layers disposed in an interlaced structure with the semiconductor substrate and the first to third electrode layers, the second capacitor structure includes a second trench formed in the semiconductor substrate, fourth, fifth, and sixth electrode layers disposed in the first trench, and fourth, fifth, and sixth dielectric layers disposed in an interlaced structure with the semiconductor substrate and the fourth to sixth electrode layers, and a connection blocking area formed between the first and second capacitor structures to block connections between elements constituting the first capacitor structure and elements constituting the second

Abstract: A supply-less transmitter output termination resistor with high accuracy is presented. This termination resistor can be used for applications with high supply voltage and low voltage devices. The termination resistor is programmable and includes many parallel branches. Each branch can be turned off or on with a switch. The biasing for the switch is in such a way that it keeps the resistance of the switch constant independent of the supply voltage or the output common mode voltage. This will increase the accuracy of the termination resistor. Besides HDMI this technique can be used for many other applications.

Abstract: A VCO circuit having low jitter and low PSS (power supply sensitivity). The VCO circuit includes a first ring oscillator stage, a second ring oscillator stage coupled to the first ring oscillator stage, and a VCO input coupled to both the first ring oscillator stage and the second ring oscillator stage for receiving a control voltage. Each of the first ring oscillator stage and the second ring oscillator stage further includes a CMOS inverter with a plurality of cross coupled transistors to implement oscillation of the VCO circuit, wherein each of the first ring oscillator stage and the second ring oscillator stage comprises a unity gain amplifier.

Abstract: A high performance CDR circuit. The circuit includes a first and second sampler, a first and second charge-pump coupled to the first and the second sampler, a capacitor coupled to the first charge pump, and a filter coupled to the second charge pump. A VCO circuit is coupled to the first charge pump and the second charge pump, wherein a path for setting a frequency is provided by the first charge pump and the capacitor, and wherein a path for phase is provided by the second charge pump, wherein a voltage of the capacitor is stable to enable the VCO to tolerate CIDs.

Abstract: A high performance CDR circuit. The circuit includes a first and second sampler, a first and second charge-pump coupled to the first and the second sampler, a capacitor coupled to the first charge pump, and a filter coupled to the second charge pump. A VCO circuit is coupled to the first charge pump and the second charge pump, wherein a path for setting a frequency is provided by the first charge pump and the capacitor, and wherein a path for phase is provided by the second charge pump, wherein a voltage of the capacitor is stable to enable the VCO to tolerate CIDs.

Abstract: A VCO circuit having low jitter and low PSS (power supply sensitivity). The VCO circuit includes a first ring oscillator stage, a second ring oscillator stage coupled to the first ring oscillator stage, and a VCO input coupled to both the first ring oscillator stage and the second ring oscillator stage for receiving a control voltage. Each of the first ring oscillator stage and the second ring oscillator stage further includes a CMOS inverter with a plurality of cross coupled transistors to implement oscillation of the VCO circuit.

Abstract: A PLL circuit having a low spur output. The PLL circuit includes a PFD (Phase-Frequency Detector), a charge-pump coupled to the PFD, an SCR (switch-capacitor resistor) coupled to the charge pump, a filter coupled to the SCR, and a VCO circuit coupled to the filter, wherein the SCR reduces an amplitude of a plurality of current pulses at an output of the charge-pump before the plurality of current pulses reach an input of the VCL circuit.