Patents Assigned to Picochip Designs Limited
  • Publication number: 20110002426
    Abstract: There is provided a rake receiver for a femtocell base station, the rake receiver being for use in receiving a multipath signal, the rake receiver comprising a plurality of fingers, and wherein the rake receiver is adapted to assign multiple fingers to the same path in the multipath signal.
    Type: Application
    Filed: December 23, 2009
    Publication date: January 6, 2011
    Applicant: PICOCHIP DESIGNS LIMITED
    Inventor: David Stuart Muirhead
  • Publication number: 20100311412
    Abstract: There is provided a method of method of estimating a quality of a signal, the method in a first device comprising measuring a signal transmitted from a second device to a third device; determining a value of a metric from an autocorrelation function of the measured signal; and determining an estimate of the quality of the signal from the determined metric.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 9, 2010
    Applicant: PICOCHIP DESIGNS LIMITED
    Inventor: Nicholas William Whinnett
  • Publication number: 20100311449
    Abstract: There is provided a method of operating a base station, the method comprising determining whether there are any mobile devices that are not associated with the base station that require protection from interference caused by downlink transmissions of the base station; and setting a maximum permitted transmission power for the base station based on the result of the step of determining.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 9, 2010
    Applicant: PICOCHIP DESIGNS LIMITED
    Inventor: Nicholas William Whinnett
  • Publication number: 20100285795
    Abstract: There is provided a method of operating a communication system, the communication system comprising at least a macrocell base station and a femtocell base station that is within the coverage area of the macrocell base station, the method comprising providing an indication of the noise rise or interference at the macrocell base station to the femtocell base station; and the femtocell base station adjusting a maximum permitted transmission power based on the indication.
    Type: Application
    Filed: May 5, 2010
    Publication date: November 11, 2010
    Applicant: Picochip Designs Limited
    Inventor: Nick Whinnett
  • Patent number: 7603541
    Abstract: A method is disclosed for achieving synchronization in an array of semi-synchronous devices. A processor array has an array of processor elements, wherein each of said processor elements comprises a cycle counter, and a master processor element is able to transmit control command signals to each of the other processor elements. Each processor element is such that, on receipt of a control command signal, it acts on that signal only when its cycle counter reaches a predetermined value, and the master processor element is such that it transmits control command signals only when its cycle counter takes a value which is within a predetermined range, or “safe window”. By appropriate setting of the “safe window”, it can be guaranteed that, when the master processor element transmits a control command signal to each of the other processor elements, those command control signals are acted upon at corresponding times within the other processor elements.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: October 13, 2009
    Assignee: Picochip Designs Limited
    Inventors: John Matthew Nolan, Roger Paul Dealtry
  • Patent number: 7574582
    Abstract: There is disclosed a processor array, which achieves an approximately constant latency. Communications to and from the farthest array elements are suitably pipelined for the distance, while communications to and from closer array elements are deliberately “over-pipelined” such that the latency to all end-point elements is the same number of clock cycles. The processor array has a plurality of primary buses, each connected to a primary bus driver, and each having a respective plurality of primary bus nodes thereon; respective pluralities of secondary buses, connected to said primary bus nodes; a plurality of processor elements, each connected to one of the secondary buses; and delay elements associated with the primary bus nodes, for delaying communications with processor elements connected to different ones of the secondary buses by different amounts, in order to achieve a degree of synchronization between operation of said processor elements.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: August 11, 2009
    Assignee: Picochip Designs Limited
    Inventor: John Matthew Nolan
  • Patent number: 7549081
    Abstract: An array of processing elements can incorporate a degree of redundancy. Specifically, the array includes one or more spare, or redundant, rows of array elements, in addition to the number required to implement the intended function or functions of the device. If a defect occurs in one of the processors in the device, then the entire row which includes that defective processor is not used, and is replaced by a spare row.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: June 16, 2009
    Assignee: picoChips Design Limited
    Inventors: William Robbins, Michael Davison, Simon Howell, Anthony Peter John Claydon
  • Publication number: 20090150420
    Abstract: There is provided a method of generating information for a software system for use in a debug information database, the software system being defined in a low-level program code, the method comprising constructing a representation of the software system from the low-level program code; examining the representation to identify predetermined patterns; and generating a database of debug information for the software system from the results of the step of examining.
    Type: Application
    Filed: November 5, 2008
    Publication date: June 11, 2009
    Applicant: Picochip Designs Limited
    Inventor: Daniel TOWNER
  • Publication number: 20090149211
    Abstract: There is provided a femtocell device for use in connecting a mobile terminal to a communication network, the femtocell device comprising means for implementing a power control procedure in which a target value for a first characteristic of transmissions received from the mobile terminal is set and adjusted based on a quality of service criteria for the transmissions; and wherein the means for implementing the power control procedure operates in a physical layer of the femtocell device.
    Type: Application
    Filed: November 4, 2008
    Publication date: June 11, 2009
    Applicant: Picochip Designs Limited
    Inventor: Christopher Brian SMART