Abstract: An information signal delay system utilizes a solid-state memory for continuously storing the information and reading it out on a time-delayed basis. An information signal is converted into a digital format and compressed using conventional compression algorithms. The compressed digital signal is then sequentially written into successive locations in a random access memory. These locations are sequentially addressed at a later point in time to read the digitized information out of the memory on a time-delayed basis relative to when it was stored in the memory. The time delay is related to the anticipated reaction time it takes to cycle completely through all of the address locations in that portion of the memory being used to store the information. The digitized information that is read out of the memory can be synthesized or otherwise suitably processed to reconstruct the original information signal as a delayed signal.