Abstract: Disclosed is a flash memory controller connected to a flash memory module. The pin-out of the flash memory controller combines ready-busy and chip-select signals. In one embodiment, the flash memory module is made up of a set of banks, each consisting of a plurality of devices, with each bank sharing a single chip-select/ready-busy connection to the controller.

Abstract: Disclosed is a mass storage system and method for breaking a host command into a hierarchy of data structures. Different types of data structures are designed to handle different phases of tasks required by the host command, and multiple data structures may be used to handle portions of the host command in parallel, thereby allowing increased performance. The disclosed embodiments include a flash memory controller designed to allow a high degree of pipelining and parallelism.

Abstract: A technique to determine topics associated with, or classifications for, a data corpus uses an initial domain-specific word list to identify word combinations (one or more words) that appear in the data corpus significantly more often than expected. Word combinations so identified are selected as topics and associated with a user-specified level of granularity. For example, topics may be associated with each table entry, each image, each sentence, each paragraph, or an entire file. Topics may be used to guide information retrieval and/or the display of topic classifications during user query operations.

Abstract: A memory for access by a program being executed by a programmable control device includes a data access structure stored in the memory, the data access structure including a first and a second index structure (each having a plurality of entries) together forming a tiered index. At least one entry in the first structure indicates an entry in the second structure. The number of entries in the second structure being dynamically changeable. A method for building a tiered index structure includes building a first-level index structure having a predetermined number of entries, building a second-level index structure having a dynamic number of entries, and establishing a link between an entry in the first-level index structure and an entry in the second-level index structure.

Abstract: The present invention simplifies the data modeling process and enables its full dynamic versioning by employing a non-hierarchical non-integrated structure to the organization of information. This is achieved by expressing data modeling, storage and transfer in a particular non-hierarchical, non-integrated neutral form. The neutral form of the present invention enables complete parallel processing of both data storage and data transfer operations. It also enables the direct integration of separate but related data models and their data without remodeling or reloading. Finally, the present invention enables direct transfer of neutral form information in a manner that includes all of the properties required to independently understand and interpret each transferred data value.

Abstract: Methods to store a first data structure having zero or more fixed-length data items and a reference to a second data structure are described. The second data structure having a variable-length data item (indicated by the reference) may also be stored in the memory. In addition, methods to validate and repair a pointer element having a file identification portion and a file offset portion are described. The methods include determining if the file identification portion indicates an allocated file and indicating an invalid pointer condition if the file identification portion indicates an unallocated file, else determining if the file offset portion indicates an allocated block in the allocated file, and indicating an invalid pointer condition if the file offset portion indicates an unallocated block. The described methods may be stored in any media that is readable and executable by a programmable control device.