Patents Assigned to Pliops Ltd
  • Patent number: 12277340
    Abstract: A method for managing a log structured merged (LSM) tree of key value (KV) pairs, the LSM tree is stored in a non-volatile memory, the method may include writing a current run from a buffer to a current run location within the LSM tree, the current run comprises current KV pairs; generating or receiving current fingerprints that are indicative of the current KV pairs; performing a run writing update of a management data structure (MDS) by adding to the MDS, mappings between the current KV pairs, the current fingerprints and a current run identifier; updating the LSM tree by merging at least some runs of the LSM tree; and performing a merge update of the MDS to represent the merging.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 15, 2025
    Assignee: PLIOPS LTD.
    Inventors: Niv Dayan, Moshe Twitto
  • Patent number: 12164493
    Abstract: A method for inserting a KV pair to a separated database, the method may include receiving a request to insert the KV pair to the separated database, wherein the separated database comprises a log structured merge (LSM) tree and KV database that is separated from LSM tree; determining whether the KV pair should be associated with a versioned LSM entry or with a non-versions LSM entry; and inserting the KV pair and a KV timestamp in the separated database according to the determining; wherein the inserting includes: storing a combination of the value and the KV timestamp in the KV database; defining an access key to the KV database; wherein the access key is based on the combination when determining that the KV pair should be associated with a versioned LSM; and wherein the access key is based on the key and not on the timestamp when determining that the KV pair should be associated with a non-versioned LSM.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: December 10, 2024
    Assignee: Pliops Ltd.
    Inventors: Guy Guetta, Edward Bortnikov, Michael Pan, Moshe Twitto, Tamar Weiss, Shmuel Dashevsky, Niv Dayan
  • Patent number: 12079209
    Abstract: A method for managing multiple checkpoints stored in a memory unit, the method may include (a) managing a checkpoint tree, by a memory controller; the checkpoint tree comprises reference nodes and active nodes; wherein a reference node of the reference nodes holds a snapshot of a parent checkpoint taken at the time that a child checkpoint was created from the parent checkpoint; wherein an active node of the active nodes that is associated with the parent node stores changes to the parent checkpoint introduced after a creation of the active node; and wherein the parent checkpoint and the child checkpoint belong to multiple checkpoints stored in the checkpoint tree; (b) receiving access requests to access key value (KV) pairs of one or more checkpoints of the multiple checkpoints; and (c) responding to the access requests based, at least in part, on the checkpoint tree.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: September 3, 2024
    Assignee: PLIOPS LTD.
    Inventors: Shmuel Dashevsky, Moshe Twitto, Yuval Rochman, Iddo Naiss
  • Patent number: 12062409
    Abstract: A memory device that may include a primary PCB that is configured to support one or more SSD units and one or more volatile memory units; a secondary PCB that is configured to mechanically support multiple supercapacitors; wherein the secondary PCB comprises an aperture and an array of heat different reduction elements configured to reduce temperature differences between different parts of the secondary PCB; a board to board connector for electrically coupling at least one electrical conductor of the primary PCB to at least one electrical conductor of the secondary PCB; a mechanical interface that has a base, a top section and a threaded hole that passes through the base and the top section; wherein the base is wider than the top section; wherein the top section is shaped and sized to enter the aperture of the secondary PCB; wherein the base is configured to support the secondary PCB when the top section enters the aperture.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: August 13, 2024
    Assignee: PLIOPS LTD.
    Inventors: Naseem Jamal, Tomer Plut, Itai Ben Zion
  • Patent number: 11914470
    Abstract: A method for error correction of logical pages of an erase block of a solid state drive (SSD) memory, the method may include determining an erase block score of the erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter; determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type; and allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: February 27, 2024
    Assignee: PLIOPS LTD.
    Inventor: Moshe Twitto
  • Patent number: 11860844
    Abstract: A method for managing a log structured merged (LSM) tree of key value (KV) pairs, the LSM tree is stored in a non-volatile memory, the method may include merging runs of the LSM tree to provide merged runs; writing merged runs to the non-volatile memory; adding new runs to the LSM tree, wherein the adding comprises writing runs to the non-volatile memory; and updating at least one management data structure (MDS) to reflect the merging and the adding; wherein an MDS of the at least one MDS stores a mapping between keys of the KV pairs of the LSM tree, fingerprints associated with the KV pairs of the LSM tree, and compressed run identifiers that identify runs of the LSM tree.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 2, 2024
    Assignee: PLIOPS LTD.
    Inventors: Niv Dayan, Moshe Twitto
  • Publication number: 20230385158
    Abstract: A method for performing a backup in relation to a separated database, the method includes creating, by a processing circuit, a new backup log structured merge (LSM) tree of the separated database, wherein the new backup LSM tree is associated with a new point in time (PIT) and belongs to a group of LSM trees that comprise a primary LSM tree and one or more backup LSM trees that are associated with different PITs, and share a key value (KV) database that is mutable and is separated from the group; wherein the creating comprises storing the new backup LSM tree to a destination.
    Type: Application
    Filed: August 14, 2023
    Publication date: November 30, 2023
    Applicant: Pliops Ltd.
    Inventors: Roey Maor, Edward Bortnikov, Eshcar Hillel, Michael Pan, Moshe Twitto
  • Patent number: 11809744
    Abstract: There may be provided, systems, method and non-transitory computer readable media for accessing a key value pair stored in a solid state drive (SSD) memory, the method may include calculating, by a SSD memory controller and based on an input key, a first bucket identifier and a first inter-bucket value; determining a block cluster that stores the key pair value, based on the first bucket identifier, the first inter-bucket value and first metadata of a first data structure; calculating, based on the input key, a second bucket identifier and a second inter-bucket value; determining at least one of a key pair value retrieval information and a representative key pair value retrieval information, based on the second bucket identifier, the second inter-bucket value and second metadata of a second data structure; wherein the second data structure is allocated to the block cluster; wherein the second metadata comprises second logical slots, a second slot locator and second collision separation metadata; wherein at le
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: November 7, 2023
    Assignee: Pliops Ltd.
    Inventors: Moshe Twitto, Yuval Rochman, Avraham Meir
  • Publication number: 20230229651
    Abstract: A method for updating a log structured merged (LSM) tree, the method includes (a) performing preemptive full merge operations at first LSM tree levels; and (b) performing capacity triggered merge operations at second LSM tree levels while imposing one or more restrictions; wherein the second LSM tree levels comprise a largest LSM tree level and one or more other second LSM tree levels that are larger from each first LSM tree level; wherein files of the one or more other second LSM tree levels are aligned with files of the largest LSM tree level.
    Type: Application
    Filed: January 18, 2023
    Publication date: July 20, 2023
    Applicant: Pliops Ltd.
    Inventors: Niv Dayan, Edward Bortnikov, Moshe Twitto
  • Patent number: 11604604
    Abstract: A method for accessing a block of information stored in a SSD memory, the method may include obtaining, by an SSD controller, an identifier associated with the block of information; accessing, using the identifier, a first data structure that maps identifiers to cluster maps; wherein the first data structure comprises block sequence metadata, wherein for at least one cluster map, the block sequence metadata comprises a sequence identifier of a sequence of blocks of information that are sequentially written to the SSD memory and are stored together in a cluster of the SSD memory; accessing a cluster map of a cluster that is associated with the sequence provide block retrieval information; and retrieving the block of information from the SSD memory, using the block retrieval information.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 14, 2023
    Assignee: PLIOPS LTD.
    Inventors: Yuval Rochman, Moshe Twitto
  • Patent number: 11605968
    Abstract: A charging device that includes (a) a DC to DC converter (“converter”) that includes a converter control input and a converter output for outputting a charging voltage to the supercapacitor, (b) an adjustable voltage divider, (c) a controller that is configured to (i) sense a supercapacitor voltage, (ii) determine a first target value of the supercapacitor voltage, based on an internal impedance of the supercapacitor and on a nominal supercapacitor voltage that is lower than the first target value of the supercapacitor voltage, and (iii) during a first phase of a charging process, output a control signal via the control output and to the converter control input, to set the charging voltage to one or more values that once provided to the supercapacitor cause the supercapacitor voltage to reach, at the end of the first phase of the charging process, the first target value of the supercapacitor voltage.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: March 14, 2023
    Assignee: PLIOPS LTD.
    Inventor: Naseem Jamal
  • Publication number: 20220311268
    Abstract: A charging device that includes (a) a DC to DC converter (“converter”) that includes a converter control input and a converter output for outputting a charging voltage to the supercapacitor, (b) an adjustable voltage divider, (c) a controller that is configured to (i) sense a supercapacitor voltage, (ii) determine a first target value of the supercapacitor voltage, based on an internal impedance of the supercapacitor and on a nominal supercapacitor voltage that is lower than the first target value of the supercapacitor voltage, and (iii) during a first phase of a charging process, output a control signal via the control output and to the converter control input, to set the charging voltage to one or more values that once provided to the supercapacitor cause the supercapacitor voltage to reach, at the end of the first phase of the charging process, the first target value of the supercapacitor voltage.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 29, 2022
    Applicant: Pliops Ltd.
    Inventor: Naseem Jamal
  • Publication number: 20220270652
    Abstract: A memory device that may include a primary PCB that is configured to support one or more SSD units and one or more volatile memory units; a secondary PCB that is configured to mechanically support multiple supercapacitors; wherein the secondary PCB comprises an aperture and an array of heat different reduction elements configured to reduce temperature differences between different parts of the secondary PCB; a board to board connector for electrically coupling at least one electrical conductor of the primary PCB to at least one electrical conductor of the secondary PCB; a mechanical interface that has a base, a top section and a threaded hole that passes through the base and the top section; wherein the base is wider than the top section; wherein the top section is shaped and sized to enter the aperture of the secondary PCB; wherein the base is configured to support the secondary PCB when the top section enters the aperture.
    Type: Application
    Filed: February 19, 2021
    Publication date: August 25, 2022
    Applicant: Pliops Ltd.
    Inventors: Naseem Jamal, Tomer Plut, Itai Ben Zion
  • Publication number: 20220188188
    Abstract: A method for error correction of logical pages of an erase block of a solid state drive (SSD) memory, the method may include determining an erase block score of the erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter; determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type; and allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 16, 2022
    Applicant: Pliops Ltd.
    Inventor: Moshe Twitto
  • Publication number: 20220075765
    Abstract: A method for managing a log structured merged (LSM) tree of key value (KV) pairs, the LSM tree is stored in a non-volatile memory, the method may include merging runs of the LSM tree to provide merged runs; writing merged runs to the non-volatile memory; adding new runs to the LSM tree, wherein the adding comprises writing runs to the non-volatile memory; and updating at least one management data structure (MDS) to reflect the merging and the adding; wherein an MDS of the at least one MDS stores a mapping between keys of the KV pairs of the LSM tree, fingerprints associated with the KV pairs of the LSM tree, and compressed run identifiers that identify runs of the LSM tree
    Type: Application
    Filed: October 27, 2020
    Publication date: March 10, 2022
    Applicant: Pliops Ltd.
    Inventors: Niv Dayan, Moshe Twitto
  • Publication number: 20220075552
    Abstract: A method for managing a log structured merged (LSM) tree of key value (KV) pairs, the LSM tree is stored in a non-volatile memory, the method may include writing a current run from a buffer to a current run location within the LSM tree, the current run comprises current KV pairs; generating or receiving current fingerprints that are indicative of the current KV pairs; performing a run writing update of a management data structure (MDS) by adding to the MDS, mappings between the current KV pairs, the current fingerprints and a current run identifier; updating the LSM tree by merging at least some runs of the LSM tree; and performing a merge update of the MDS to represent the merging.
    Type: Application
    Filed: October 27, 2020
    Publication date: March 10, 2022
    Applicant: Pliops Ltd.
    Inventors: Niv Dayan, Moshe Twitto
  • Patent number: 11210166
    Abstract: A method for error correction of logical pages of an erase block of a solid state drive (SSD) memory, the method may include determining an erase block score of the erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter; determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type; and allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: December 28, 2021
    Assignee: Pliops Ltd.
    Inventor: Moshe Twitto
  • Publication number: 20210055886
    Abstract: There may be provided, systems, method and non-transitory computer readable media for accessing a key value pair stored in a solid state drive (SSD) memory, the method may include calculating, by a SSD memory controller and based on an input key, a first bucket identifier and a first inter-bucket value; determining a block cluster that stores the key pair value, based on the first bucket identifier, the first inter-bucket value and first metadata of a first data structure; calculating, based on the input key, a second bucket identifier and a second inter-bucket value; determining at least one of a key pair value retrieval information and a representative key pair value retrieval information, based on the second bucket identifier, the second inter-bucket value and second metadata of a second data structure; wherein the second data structure is allocated to the block cluster; wherein the second metadata comprises second logical slots, a second slot locator and second collision separation metadata; wherein at le
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Applicant: Pliops Ltd.
    Inventors: Moshe Twitto, Yuval Rochman, Avraham Meir
  • Patent number: 10860249
    Abstract: There may be provided, systems, method and non-transitory computer readable media for accessing a key value pair stored in a solid state drive (SSD) memory, the method may include calculating, by a SSD memory controller and based on an input key, a first bucket identifier and a first inter-bucket value; determining a block cluster that stores the key pair value, based on the first bucket identifier, the first inter-bucket value and first metadata of a first data structure; calculating, based on the input key, a second bucket identifier and a second inter-bucket value; determining key pair value retrieval information, based on the second bucket identifier, the second inter-bucket value and second metadata of a second data structure; wherein the second data structure is allocated to the block cluster; and retrieving at least the value of the key pair value based on the key pair value retrieval information.
    Type: Grant
    Filed: December 24, 2018
    Date of Patent: December 8, 2020
    Assignee: Pliops Ltd.
    Inventors: Moshe Twitto, Yuval Rochman, Avraham Meir
  • Patent number: 10769064
    Abstract: A method for accessing a key-value pair stored in a SSD memory, the method may include receiving, by a SSD memory controller, an input key; applying a first hash function on an input key to provide a first address; reading, using the first address, an indicator that indicates whether (a) the input key is associated with a group of key-value pairs or whether (b) the input key is associated only with the key-value pair; retrieving, from the SSD memory, the values of the group associated with the input key, and extracting the value of the key-value pair, when the indicator indicates that the input key is associated with the group; and retrieving, from the SSD memory, a value of a key-value pair, when the indicator indicates that the input key is associated with the key-value pair.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: September 8, 2020
    Assignee: Pliops Ltd
    Inventor: Moshe Twitto