Patents Assigned to Polyclad Laminates, Inc.
  • Publication number: 20060102882
    Abstract: Flame retardant compositions that are halogen-free or substantially halogen-free are disclosed. In certain examples, the compositions comprise a halogen-free or substantially halogen-free epoxide and one or more phosphorated compounds. In some examples, the phosphorated compound comprises an average particle size less than 10 microns. In other examples, the phosphorated compound provides a surface area of 78.5 ?m2 to about 1965 ?m2. Prepregs, laminates, molded articles and printed circuit boards using the compositions are also disclosed.
    Type: Application
    Filed: November 8, 2005
    Publication date: May 18, 2006
    Applicant: Polyclad Laminates, Inc.
    Inventors: David Bedner, William Varnell
  • Publication number: 20060074151
    Abstract: Dielectric compositions comprising a first component and a second component present at about 5 parts to about 60 parts filler per 100 parts of the first component are disclosed. In certain examples, the first component includes a polyphenylene ether, a polyepoxide, and optionally a compatibilizing agent and a catalyst. Certain examples of the dielectric compositions disclosed herein have low coefficients of thermal expansion. Prepregs, laminates, molded articles and printed circuit boards using the dielectric compositions are also disclosed.
    Type: Application
    Filed: September 28, 2004
    Publication date: April 6, 2006
    Applicant: Polyclad Laminates, Inc.
    Inventors: Guoren He, William Varnell, Thomas Williams
  • Publication number: 20060069185
    Abstract: Flame retardant compositions that are halogen-free or substantially halogen-free are disclosed. In certain examples, the compositions comprise a polyphenylene ether, a halogen-free or substantially halogen-free polyepoxide, and one or more phosphorated compounds. Prepregs, laminates, molded articles and printed circuit boards using the compositions are also disclosed.
    Type: Application
    Filed: September 28, 2004
    Publication date: March 30, 2006
    Applicant: Polyclad Laminates, Inc.
    Inventors: Guoren He, William Varnell, Thomas Williams
  • Patent number: 6955740
    Abstract: A laminate to be used in the manufacture of printed circuit boards is formed by contacting one surface of a layer of a conductive foil (e.g. copper foil) with protective-carrier sheeting (e.g., aluminum foil) and the other surface of the conductive foil with a dielectric layer (e.g., prepreg). The contacted layers are stacked and cut to desired dimensions. The process is performed without use of adhesive or mechanical attachment. Consequently, contamination and the occurrence of imperfections in the conductive foil of a laminate to be used in a printed wiring board can be substantially reduced.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: October 18, 2005
    Assignee: Polyclad Laminates, Inc.
    Inventors: Joseph C. Rapuano, Peter L. Samevall, Ronny Varul
  • Patent number: 6768316
    Abstract: A laminate comprising an insulation layer sandwiched between a pair of electrically conductive layers is prepared for electrical insulation testing by using a laser to remove a strip from at least one of the conductive layers proximate the edge of the laminate to electrically isolate a central, bulk portion of the conductive layer from the edges of the laminate. Conductive material that may be smeared across an edge of the laminate will not therefore provide an electrical short between the portion of the conductive layer surrounded by the slot and the second conductive layer on the opposite side of the insulation layer.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: July 27, 2004
    Assignee: Polyclad Laminates, Inc.
    Inventors: Yeo Kong Hoo, Christopher Vernon Smith
  • Patent number: 6632511
    Abstract: The present invention is directed to filled prepregs, laminates, printed circuit boards comprising a reinforcing material impregnated with a cured polymeric resin, the cured polymeric resin comprising multicellular polymeric microspheres as a filler. Pre-pregs, laminates and printed circuit boards prepared by this method have reduced dielectric constant as low as 3.0, depending upon the resin system of the matrix. In addition, such laminates and printed circuit boards have enhanced electrical, thermal and mechanical properties as well as improved machinability, low density and a uniform appearance.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: October 14, 2003
    Assignee: Polyclad Laminates, Inc.
    Inventor: Dong Zhang
  • Patent number: 6618238
    Abstract: A novel capacitor foil and printed circuit board intermediate made using that foil are disclosed. The capacitor foil is a three-layer construction having a conductive layer, a partially-cured high dielectric constant layer, and a partially-cured bonding layer. The high dielectric constant and bonding layers are formed with epoxy or other polymer, however, the high dielectric constant layer is loaded with capacitive ceramic particles or pre-fired ceramic forming particles. The bonding layer may or may not be filled with ceramic particles or prefired ceramic-forming particles. The resulting capacitor foil may be applied to a laminate having copper patterns thereon to define a PCB intermediate containing at least one buried capacitor device. Multiple layers of capacitance material also can be used to increase the overall capacitance of the board.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: September 9, 2003
    Assignee: Polyclad Laminates, Inc.
    Inventor: Robert J. Sanville, Jr.
  • Patent number: 6609294
    Abstract: A novel process for fabricating metal clad laminates used in the manufacture of printed wiring boards. The process which eliminates multiple use separator plates within laminate books during buildup and pressing, utilizes a sacrificial separator sheet between copper sheets and wherein the separator sheet remains intact throughout the pressing and cutting steps and is finally removed after the laminates have been sized to the desired dimensions. This process provides time and cost savings, as well as a significant increase in quality and quantity of the laminates produced.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: August 26, 2003
    Assignee: Polyclad Laminates, Inc.
    Inventors: Christopher Vernon Smith, Richard Allen Correia, Ed Carignan
  • Patent number: 6584820
    Abstract: The invention provides a method for producing a metal plate with an enhanced surface. More particularly, the method of the invention produces a metal press plate with a roughened matte surface having a substantially uniform and raised surface topography for use in the manufacture of laminated and multilayer materials used to fabricate circuit boards and other electronic assemblies. The method of the invention also cleans and reprocesses the roughened matte surface of the metal press plate after use in laminate and multilayer materials production to reestablish the substantially uniform and raised surface topography. The invention also provides a metal press plate produced according to the method of the invention.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: July 1, 2003
    Assignee: Polyclad Laminates, Inc.
    Inventors: Scott M. Benedict, Edward Carignan, Mark Ferman, Matthew Lampron
  • Publication number: 20030091800
    Abstract: The present invention is directed to filled prepregs, laminates, printed circuit boards comprising a reinforcing material impregnated with a cured polymeric resin, the cured polymeric resin comprising multicellular polymeric microspheres as a filler. Pre-pregs, laminates and printed circuit boards prepared by this method have reduced dielectric constant as low as 3.0, depending upon the resin system of the matrix. In addition, such laminates and printed circuit boards have enhanced electrical, thermal and mechanical properties as well as improved machinability, low density and a uniform appearance.
    Type: Application
    Filed: November 9, 2001
    Publication date: May 15, 2003
    Applicant: Polyclad Laminates, Inc.
    Inventor: Dong Zhang
  • Patent number: 6436276
    Abstract: A novel photoresist stripping process is disclosed. Specifically, it has been found that if a printed wiring board panel having photoresist on its surface is used as a cathode during electrolysis in an alkaline solution, the result is a rapid and complete photoresist removal with minimal sheeting of removed photoresist and no evidence of chemical attack upon metallic traces on the printed wiring board.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: August 20, 2002
    Assignee: Polyclad Laminates, Inc.
    Inventor: Eric Yakobson
  • Patent number: 5779870
    Abstract: Drum or smooth side-treated metal foil can be used either as an intermediate product for use in the manufacture of laminate or as a part of the finished laminate to be used in the manufacture of multi-layer printed circuit board (PCB) packages. By treating the drum or smooth side of metal foil with a bond strength enhancer rather than treating the matte side or rough side, or both sides, several time-consuming and costly steps can be bypassed in the manufacture of multi-layer printed circuit boards (PCB) while the integrity of the metal foil, -laminate and multi-layer PCB are not compromised and are actually enhanced by way of improved impedance control and adhesion characteristics after relamination. This novel foil can be initially bonded to substrate on either side before circuit formation and can be used either as an internal foil layer or as a foil cap. The invention includes methods of manufacture of the metal foil, laminate and multi-layer printed circuit board.
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: July 14, 1998
    Assignee: Polyclad Laminates, Inc.
    Inventor: D. Eric Seip
  • Patent number: 5670250
    Abstract: This invention involves a prepreg composition and procedure for use in forming printed circuit boards with reduced and uniform dielectric constant, improved thermal expansion characteristics, and uniform appearance. The prepreg composite is a resin impregnated substrate and has a reduced dielectric constant as low as 3.5. It contains 5-30% by resin volume of hollow inorganic microsphere filler whose diameters are less than 40 micrometers, and the uniform distribution of the hollow inorganic microspheres is controlled by the presence of hydrophobic fumed silica or other similar flow modifier.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: September 23, 1997
    Assignee: Polyclad Laminates, Inc.
    Inventors: Robert J. Sanville, Jr., Carl P. Kernander