Patents Assigned to Polycon
  • Patent number: 5023205
    Abstract: Hybrid circuit structures and methods of fabrication which result in improved manufacturing yields and reliability in use are disclosed. The methods disclosed include methods of forming on the hybrid circuit substrate, a ground plane, bonding pads, and interconnects, which minimize the likelihood of forming catastrophic defects in various insulation layers during the manufacturing processing, which minimize the likelihood of damage to the bonding pads when bonding integrated circuit leads thereto, and which minimize the thermal stressing of a finished product due to the differential expansion between the various layers making up the same. Alternate methods and structures are disclosed.
    Type: Grant
    Filed: April 27, 1989
    Date of Patent: June 11, 1991
    Assignee: Polycon
    Inventor: John J. Reche