Patents Assigned to Potentia Semiconductor, Inc.
  • Patent number: 7501801
    Abstract: A power supply trim control signal is produced by integrating differences between monitored and target values of the output voltage of a power supply. Register storage requirements are reduced by producing the target value from a nominal voltage value and one of a plurality of margin offsets selected in accordance with control data. The control data also selects between open and closed loop trim control. Stability is enhanced by changing the target value slowly in response to any change in the control data.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: March 10, 2009
    Assignee: Potentia Semiconductor Inc.
    Inventors: David Alan Brown, Mircea Cristian Boros
  • Patent number: 7424060
    Abstract: A data coupler comprises two CMOS drivers which are supplied with a data signal and a delayed version of the data signal to drive a primary winding of a transformer with narrow pulses of opposite polarity corresponding to respective edges of the data signal. A secondary winding of the transformer is coupled via a low pass filter to a data receiver, with a ground path for ac from one end of the secondary winding. The drivers are scaled with a ratio (N?1):(N+1), where the transformer has a primary-to-secondary turns ratio of N:1 and N is greater than one, to equalize voltage drops in the drivers due to consequent unequal common mode currents in the drivers.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: September 9, 2008
    Assignee: Potentia Semiconductor Inc.
    Inventor: Dave Brown
  • Patent number: 7365559
    Abstract: A power MOSFET, comprising main and current mirror MOSFETs, has a current sense resistance coupled between its mirror and source terminals and a monitoring circuit responsive to a first voltage dependent upon current through the current sense resistance. The circuit arrangement includes a circuit that determines a second voltage, different from the first voltage, of a terminal of the current mirror MOSFET, and a circuit arranged to determine current of the power MOSFET in dependence upon the first and second voltages. The second voltage can be the voltage at the drain terminal, or the voltage at the mirror terminal with switching of the current sense resistance or a current that it passes. It can alternatively be determined by a control circuit to be a desired fraction of the drain voltage.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: April 29, 2008
    Assignee: Potentia Semiconductor Inc.
    Inventor: Roger Colbeck
  • Patent number: 7332358
    Abstract: A MOSFET has its gate voltage controlled to provide a constant drain current of the MOSFET, for example to limit inrush current for charging a capacitance of a power supply arrangement. A decrease in the gate voltage supplied to the MOSFET, corresponding to an increase in the junction temperature of the MOSFET, by more than a determined amount is detected and used to reduce the gate voltage, and hence the drain current, for example to zero, to prevent heating of the MOSFET beyond a maximum operating temperature.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: February 19, 2008
    Assignee: Potentia Semiconductor Inc.
    Inventor: Raymond K. Orr
  • Patent number: 7135789
    Abstract: Power supplies, supplied with an input voltage to produce output voltages, are controlled in a desired sequence, and their output voltages are monitored, by respective state machines of two or more control units which are coupled in cascade by a bidirectional signal path on which commands and acknowledgements are coupled serially in frames. Within each control unit, each state machine communicates with all of the other state machines, so that the power supplies controlled by a single control unit can include divergent and convergent as well as linear sequence paths. The sequence is linear between adjacent control units, with logical combinations of received and locally-produced commands and acknowledgements. An input state machine in the first control unit in the cascade monitors the input voltage to initiate a power-up sequence.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: November 14, 2006
    Assignee: Potentia Semiconductor, Inc.
    Inventors: Mircea Cristian Boros, David Alan Brown
  • Patent number: 7080273
    Abstract: Power supplies are enabled and disabled in sequence by a controller in dependence upon output voltages of the power supplies monitored by the controller. The controller allows proper sequencing of the power supplies when one or more of them is provided on a daughter board, when this is not connected to a mother board on which the controller is provided, by storing information as to any power supply provided on the daughter board, detecting when the daughter board is not connected to the mother board, and in that case enabling the power supplies in sequence independently of any monitored output voltage of such a power supply on the daughter board.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: July 18, 2006
    Assignee: Potentia Semiconductor, Inc.
    Inventors: David Alan Brown, Muge Guher
  • Patent number: 7078971
    Abstract: A class AB output stage of a CMOS amplifier has a level-shifting voltage follower constituted by a level-shifting transistor and a current source. A bias circuit replicates the level-shifting voltage follower in a feedback arrangement to produce a variable bias voltage for the current source of both the main and replica level-shifters. The arrangement serves to control the output voltage of the level-shifter such that it provides the amplifier with a relatively constant quiescent current of the output stage over variations of manufacturing process, supply voltage, and temperature. The level shifting function can be facilitated by a resistive on-state of a power-down transistor between the level-shifting and load transistors.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: July 18, 2006
    Assignee: Potentia Semiconductor Inc.
    Inventor: Roger Colbeck
  • Patent number: 7071838
    Abstract: A power supply controller has two control units for coupling to primary and secondary sides of controlled power supplies, the units being coupled via a transformer which couples signals between the units, a power supply voltage for the secondary-side unit being derived from signals coupled from the primary-side unit. Initially signals are coupled from the primary unit with an increasing duty cycle to charge a secondary-side power supply capacitor. Subsequently signals are coupled in signal frames in alternating directions between the units, each signal frame from each unit indicating whether or not signal frames are correctly received from the other control unit. The signal frames also provide for downloading information for the control units, and other status signals and commands and acknowledgements.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: July 4, 2006
    Assignee: Potentia Semiconductor, Inc.
    Inventors: David Alan Brown, Mircea Cristian Boros
  • Patent number: 6924990
    Abstract: A switch mode power supply and its start-up circuit produce a controlled output voltage from an input voltage. A power supply control circuit is powered by the output voltage and is responsive to the output voltage to control the power supply. The control circuit responds to differences between a fraction of the output voltage and a reference voltage to control the start-up circuit. This control is inhibited at low values of the output voltage to ensure that the power supply starts up correctly despite the reference voltage being indefinite or unstable at such low values of the output voltage.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: August 2, 2005
    Assignee: Potentia Semiconductor, Inc.
    Inventors: Roger Peter Colbeck, Rajko Duvnjak
  • Patent number: 6917226
    Abstract: A signal is coupled from the primary to the secondary of a transformer, to a signal receiver which has a supply voltage derived from the signal via a rectifier arrangement including a filter capacitor. A plurality of signal drivers on the primary side have their outputs enabled by output enable signals with different timing for different ones of the drivers. The different timing includes small delays to spread crowbar currents over a short period, enabling an increasing number of drivers with increasing initial charge of the capacitor, and disabling drivers while others remain enabled, in order to reduce peak currents and kick-back voltages.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: July 12, 2005
    Assignee: Potentia Semiconductor, Inc.
    Inventor: David Alan Brown
  • Patent number: 6911746
    Abstract: An isolating coupling arrangement couples signals in both directions via a transformer between first and second (or more) units each having differential signal transmit buffers and receivers. A diode bridge and capacitor produce an isolated power supply voltage for the second unit from signals coupled from the first unit via the transformer. The diode bridge can use intrinsic diodes of CMOS output circuits of the transmit buffers, which can be controlled synchronously using a phase locked loop responsive to signals coupled from the first unit via the transformer. A supply voltage for the first unit can be increased to compensate for voltage drops of the diode bridge on start-up prior to the synchronous operation. A resistor in parallel with a diode of the bridge provides an asymmetrical load to create a DC component of transformer magnetizing current to eliminate oscillations during signal gaps.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: June 28, 2005
    Assignee: Potentia Semiconductor, Inc.
    Inventors: Raymond Kenneth Orr, Yan-Fei Liu, David Alan Brown, Rajko Duvnjak
  • Patent number: 6879139
    Abstract: Power supplies are enabled and disabled in sequence in dependence upon monitored output voltages of, and an input voltage for, the power supplies. Bits stored in registers for each power supply represent the predetermined sequences in which the power supplies are enabled and disabled, and fault dependencies for the power supplies. The sequences can include independent, linear, divergent, and convergent paths. The registers are loaded from a non-volatile memory on power-up of a power supply controller also powered from the input voltage.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: April 12, 2005
    Assignee: Potentia Semiconductor, Inc.
    Inventors: David Alan Brown, Muge Guher
  • Patent number: 6850048
    Abstract: A power supply controller controls power supplies for power-up and/or shut-down in a desired sequence. An input voltage for the power supplies powers, and is monitored by, a first control unit having outputs for enabling the power supplies. A second control unit monitors output voltages of the power supplies, and an isolating signal coupler couples signals in both directions between the first and second control units. The second control unit is powered in an isolated manner from the input voltage, conveniently via a transformer constituting the signal coupler. The control units together respond to the monitored voltages for enabling the power supplies in accordance with the desired sequence, information for which can be stored in a non-volatile store. The second control unit can also include enable outputs isolated from the input voltage, and trim outputs for adjusting the monitored voltages.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: February 1, 2005
    Assignee: Potentia Semiconductor, Inc.
    Inventors: Raymond Kenneth Orr, Yan-Fei Liu, Roger Peter Colbeck, David Alan Brown, Hartley Fred Horwitz
  • Patent number: 6771518
    Abstract: In a DC converter, a transformer has a first winding coupled in series with a first capacitor and a first switch between a first pair of terminals, and a second winding coupled in series with a second capacitor and an inductor between a second pair of terminals. A second switch is coupled in parallel with the series-connected first winding and first capacitor. A third switch or diode is coupled in parallel with the series-connected second winding and second capacitor. The capacitors provide energy transfer in either direction via the transformer. Leakage inductance of the transformer facilitates zero voltage switching conditions, and the transformer core is reset in each cycle by charge balancing between the capacitors. The switches can comprise AC switches. The transformer can be an autotransformer.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: August 3, 2004
    Assignee: Potentia Semiconductor, Inc.
    Inventors: Raymond K Orr, Yan-Fei Liu