Abstract: A transistor package having input, reference (ground) and output terminals includes a ceramic base metallized to provide a ground plane and an isolated collector pad; and also includes a transistor die disposed on the pad. An equivalent output circuit of the transistor die describes an output impedance having a capacitive reactance. Pairs of wires are connected from the ground plane to the collector pad in series with DC blocking capacitors to provide an inductive reactance in parallel with the capacitive reactance of the transistor die. The pairs of wires are disposed in a transverse, preferably a substantially perpendicular, relationship and are connected to the collector pad at distributed, preferably uniformly distributed, positions along such area. This provides for a substantially uniform distribution of current throughout the transistor die and a substantially uniform junction temperature throughout the die.