Abstract: Presented herein is a circuit path configuration for enhancing overvoltage protection in a switching power supply, the switching power supply comprising a bridge rectifier, a primary side switch, and a controller. The circuit path configuration implements input OVP by availing a clamping voltage indicative of a drain-to-source voltage of the primary side switch. The bridge rectifier provides a rectified voltage to a first node. The primary side switch comprises a drain; and the drain is electrically coupled to the first node via a first circuit path. The first circuit path comprises a first circuit path node between the first node and the drain. The controller comprises a voltage monitor input electrically coupled to the first circuit path node via a second circuit path; and the second circuit path provides a monitor voltage to the voltage monitor input.

Abstract: Fast turn-on protection of a cascode switch is presented herein. A cascode circuit includes a depletion mode field effect transistor and an enhancement mode field effect transistor electrically coupled in cascode. During turn-on, a protection circuit detects an overcurrent fault by observing a plateau of a cascode node voltage. An overcurrent fault may be detected in response to the plateau existing for greater than a threshold time duration.

Abstract: A housing or surface of a housing containing at least one heat dissipating device configured to be grasped or otherwise held by a user. The housing includes a first housing wall portion with a plurality of grasping features that protrude from the first housing wall portion and a second housing wall portion with a second plurality of grasping features that protrude from the second housing wall portion. The first plurality of grasping features and second plurality of grasping features prevent a user from contacting the first housing wall portion and the second housing wall portion.

Abstract: An energy transfer element comprises a magnetic core having a gap in a magnetic path. Magnetizable material producing an initial flux density is positioned in the gap. One or more power windings is wrapped around the magnetic path. When the magnetizable material is magnetized the flux density produced by the magnetized material is offset from the initial flux density. The core is a toroid magnetic core or is comprised of two core pieces. The magnetizable material is an unmagnetized magnet or a mixture of a suspension medium comprising uncured epoxy and magnetizable particles. The magnetizable particles are selected from a group comprising Neodymium Iron Boron (NdFeB) based materials or Samarium Cobalt (SmCo) based material.

Abstract: An energy transfer element comprises a magnetic core having a gap in a magnetic path. Magnetizable material producing an initial flux density is positioned in the gap. One or more power windings is wrapped around the magnetic path. When the magnetizable material is magnetized the flux density produced by the magnetized material is offset from the initial flux density. The core is a toroid magnetic core or is comprised of two core pieces. The magnetizable material is an unmagnetized magnet or a mixture of a suspension medium comprising uncured epoxy and magnetizable particles. The magnetizable particles are selected from a group comprising Neodymium Iron Boron (NdFeB) based materials or Samarium Cobalt (SmCo) based material.

Abstract: A controller for a power converter includes a primary controller and a secondary controller. The primary controller is coupled to a primary winding of the energy transfer element and a primary switch of the power converter. The secondary controller is coupled to a secondary winding of the energy transfer element and a secondary switch, e.g., a synchronous rectifier, of the power converter. The secondary controller has a synchronous rectifier control/drive circuit, a control logic circuit, and a cross conduction detector circuit. Cross conduction is when the primary switch turns on when the secondary switch is active. The cross-conduction detector circuit produces a Disable SR signal when cross conduction event detected. The cross-conduction detector circuit detects zero voltage switching cross conduction event and a minimum conduction period cross conduction event. The SR drive circuit disables the synchronous rectifier in response to receiving the Disable SR signal.

Abstract: Detecting signals from cascode power devices is described herein. By sensing a gate signal from the high-voltage device, drain waveform characteristics may be monitored. In this manner a power switch may be controlled to avail enhanced performance in a power converter comprising a cascode power device.

Abstract: A switched inductive storage element to enhance gate drive at turn-off is described herein. An inductive storage element (e.g., an inductor) may be switched between a supply node and a gate node of a gated device (e.g., a low-side device and/or a high-side device). While coupled to the supply node, the inductive storage element may be energized; and subsequently, while coupled to the gate node of the gated device, the inductive storage element may drive the gate node (i.e., the gate of the low-side and/or high-side device) below the local ground potential.

Abstract: A power converter controller with a bias drive circuit for bias supply is provided herein. The controller includes a primary drive circuit configured to control operation of a primary switch coupled to a primary winding associated with the energy transfer element. The primary drive circuit can cause the primary switch to transition between a conducting state during a first portion of a switching cycle and a nonconducting state during a second portion of the switching cycle. The controller also includes a bias drive circuit configured to control operation of a bias switch coupled to an auxiliary winding associated with the energy transfer element to drive a bias current to a bypass capacitor coupled to the bias drive circuit for providing a bias supply to the controller.

Abstract: A controller includes a primary controller and a secondary controller to control switching of a power switch and a supplemental switch, respectively, coupled to an energy transfer element, e.g. an energy transfer element of a power converter. A ZV drive circuit are coupled to generate a ZVS signal that enables a ZV switch to store energy in the energy transfer element. The energy stored in the energy transfer element is coupled to reduce a switch voltage across the power switch prior to a next ON section of the primary drive signal. The secondary drive signal is generated in response to the drive signal and the ZVS signal.

Abstract: A die seal ring including a two-dimensional electron gas is presented herein. A semiconductor device comprises an active device region. The active device region comprises a device terminal; and a die seal ring comprising a two dimensional electron gas region surrounds the active device region. By electrically coupling the device terminal to the two dimensional electron gas region, voltages at the semiconductor sidewall may be controlled to substantially equal that of the device terminal.

Abstract: An integrated circuit package includes a lead frame and an encapsulation that substantially encloses the lead frame. The lead frame further includes a first conductor comprising a first conductive loop and a second conductor galvanically isolated from the first conductor, proximate to and magnetically coupled to the first conductive loop to provide a communication link between the first and second conductor. The second conductor includes a first conductive portion, a second conductive portion, and a wire coupling together the first conductive portion and the second conductive portion.

Abstract: A secondary controller for use in a power converter includes a drive circuit coupled to a secondary side of the power converter. The drive circuit is configured to generate a first signal to enable a first switch coupled to a primary side of the primary converter. The first signal is generated in response to a feedback signal representative of an output of the power converter. A control circuit is coupled to receive the first signal and an input signal representative of a secondary winding voltage of the power converter. The control circuit is configured to generate a second signal to control a second switch coupled to the secondary side of the power converter. The control circuit is configured to generate the second signal in response to the first signal and a compare signal, and in response to an output of a latch.

Abstract: A lateral surface gate vertical field effect transistor with adjustable output capacitance is described herein. The lateral surface gate vertical field effect transistor includes both a lateral gate and a trench gate. The lateral gate modulates a surface channel and the trench gate includes a controllable depth. The controllable depth may be varied to advantageously adjust output capacitance.

Abstract: Fast turn-on protection of a cascode switch is presented herein. A cascode circuit includes a depletion mode field effect transistor and an enhancement mode field effect transistor electrically coupled in cascode. During turn-on, a protection circuit detects an overcurrent fault by observing a plateau of a cascode node voltage. An overcurrent fault may be detected in response to the plateau existing for greater than a threshold time duration.

Abstract: A cascode switch comprising a normally-on semiconductor device comprising a gate, a source and a drain, and a normally-off semiconductor device comprising a gate, a source and a drain. The drain of the normally-off semiconductor device coupled to the normally-on semiconductor device, the source of the normally-on semiconductor device coupled to the drain of the normally-off semiconductor device and the gate of the normally-on semiconductor device coupled to the source of the normally-off semiconductor device. The cascode switch further comprises a leakage current clamp coupled across the normally-off semiconductor device, the leakage current clamp circuit configured to prevent the drain of the normally-off semiconductor from going too high due to leakage current.

Abstract: A method of forming one or more contact regions in a high-voltage field effect transistor (HFET) includes providing a semiconductor material, including a first active layer and a second active layer, with a gate dielectric disposed on a surface of the semiconductor material. A first contact to the semiconductor material is formed that extends through the second active layer into the first active layer, and a passivation layer is deposited, where the gate dielectric is disposed between the passivation layer and the second active layer. An interconnect is formed extending through the first passivation layer and coupled to the first contact. An interlayer dielectric is deposited proximate to the interconnect, and a plug is formed extending into the interlayer dielectric and coupled to the first portion of the interconnect.

Abstract: A switch mode power converter with selectable power paths is described herein. The switch mode power converter comprises a plurality of stacked secondary windings and secondary side circuitry. The plurality of stacked secondary windings comprises a first winding and a second winding. Additionally, the secondary side circuitry comprises a first power path, a second power path, and a power multiplexer (MUX). The first power path is electrically coupled to the first winding; and the second power path is electrically coupled to the second winding. The power MUX is configured to select and transition between the first power path and the second power path to provide a single output power path to a load.

Abstract: The system comprises a plurality of driver modules coupled by a fault condition bus, e.g. single-wire bus. Each driver module includes an Error Flag Interface block coupled between a single terminal error flag input/output (EF I/O) and a Control block. Each driver module may be coupled- to a motor. When a driver module detects a local fault condition, its Error Flag Interface block is configured to lower the voltage at the single terminal EF I/O to communicate the change to the other driver modules. The Error Flag Interface block is further configured to monitor voltage changes at its single terminal EF I/O. An external fault condition is detected when the single terminal EF I/O is at a low voltage. The Error Flag Interface block is further configured to send a signal disabling the output of the driver module.

Abstract: Apparatus and methods for sensing resonant circuit signals to enhance control in a resonant converter are described herein. A buffer circuit coupled in parallel with or across a resonant component (e.g., a transformer) input port avails a buffered primary port signal for use in resonant conversion. The buffered primary port signal is a comprehensive signal including information relating to both input voltage and input power; and it may be used to advantageously enhance switching and power conversion in an inductor-inductor capacitor (LLC) converter. Additionally, the LLC converter uses a sense interface circuit to provide a scaled replica of the buffered primary port signal. In one example the scaled replica can advantageously be used with a secondary side controller to control output power based on the comprehensive information contained within the buffered primary port signal.