Patents Assigned to Power Integrations, Inc.
  • Patent number: 9973183
    Abstract: A lateral semiconductor field-effect transistor (FET) device fabricated on a substrate includes a high-voltage main FET having interdigitated, elongated source and drain electrode fingers each of which is electrically connected to a respective interdigitated, elongated source and drain region disposed in the substrate. The FET device further includes first and second sense FETs each having a drain region in common with the high-voltage main FET. The sense FETS also include respective first and second elongated source electrode fingers each of which is electrically connected to respective first and second elongated source regions of the first and second sense FETs, respectively. The first and second elongated source electrode fingers are disposed length-wise adjacent to one of the elongated drain electrode fingers. The first elongated source finger has a first length, and the second elongated source finger has a second length, the second length being less than the first length.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: May 15, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Lin Zhu, Kamal Raj Varadarajan, Yury Gaknoki
  • Patent number: 9972681
    Abstract: A semiconductor device including a dummy pillar and a plurality of racetrack pillars. The dummy pillar of semiconductor material extends in a first lateral direction. The plurality of racetrack pillars, including the semiconducting material, surrounds the dummy pillar. Each of the plurality of racetrack pillars has a first linear section, which extends in the first lateral direction, and a first rounded section to form a racetrack shape. The plurality of racetrack pillars includes a first racetrack pillar and a second racetrack pillar. The first racetrack pillar is disposed proximate to the dummy pillar and the second racetrack pillar surrounds the first racetrack pillar. The first racetrack pillar is disposed between the dummy pillar and the second racetrack pillar. The semiconductor device includes a plurality of spacing regions including a first spacing region that surrounds the dummy pillar and is disposed between the first racetrack pillar and the dummy pillar.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: May 15, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Alexei Ankoudinov, Sorin Georgescu, Vijay Parthasarathy, Kelly Marcum, Jiankang Bu
  • Patent number: 9954461
    Abstract: A controller for use in a power converter includes a current sense circuit to generate a current limit signal and an overcurrent signal in response to a source signal, a first sense finger signal, and a second sense finger signal. A control circuit is coupled to generate a control signal in response to the current limit signal and the overcurrent limit signal. A drive circuit is coupled to generate a drive signal with a multiple stage gate drive in response to the control signal. The drive signal in a first stage of the multiple stage gate drive is a weak turn on drive signal to turn a switch on slowly to reduce electromagnetic interference (EMI). The drive signal in a second stage of the multiple stage gate drive is a strong turn on drive signal to fully turn on the switch quickly to enable accurate current sensing of the switch.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: April 24, 2018
    Assignee: Power Integrations, Inc.
    Inventor: Rajko Duvnjak
  • Patent number: 9929656
    Abstract: A power converter controller includes a primary controller and a secondary controller. The primary controller is coupled to receive one or more request signals from the secondary controller and transition a power switch from an OFF state to an ON state in response to the received request signals. The secondary controller is coupled to transmit the request signals to the primary controller and control the amount of time between the transmission of each of the request signals. The secondary controller includes a timing circuit that sets a minimum amount of time between the transmission of the request signals. The secondary controller also includes a secondary switch control circuit coupled to trigger the timing circuit in response to transmitting a request signal.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: March 27, 2018
    Assignee: Power Integrations, Inc.
    Inventors: David Michael Hugh Matthews, Balu Balakrishnan, David Kung
  • Patent number: 9918361
    Abstract: A light-emitting diode (LED) tube including a ballast compatible buffer circuit for interfacing with a ballast circuit and for driving a light-emitting diode LED tube. The LED tube includes an LED driver circuit with first and second input terminals coupled to receive an ac input signal from the ballast circuit, an input rectifier circuit coupled to receive the ac input signal and output a rectified voltage signal, a switching regulator including a regulator switch controlled by a controller that regulates transfer of energy to the LED load through an energy transfer element and the ballast compatible buffer circuit.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: March 13, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Marvin C Espino, Donnie Rey G. Saturno
  • Patent number: 9912242
    Abstract: A method for regulating an output of a power converter includes receiving a signal at a single terminal of an integrated circuit controller. The signal at the single terminal represents a line input voltage of the power converter during at least a portion of an on time of a power switch. The signal at the single terminal represents an output voltage of the power converter during at least a portion of an off time of the power switch. The power switch is switched in response to the signal to regulate the output of the power converter.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: March 6, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Balu Balakrishnan
  • Patent number: 9893630
    Abstract: A power converter controller includes a drive circuit that generates a drive signal to switch a power switch to control a transfer of energy to an output of the power converter in response to a current sense signal, a feedback signal, and a current limit signal. A current limit generator generates the current limit signal in response to a load coupled to the output. An audible noise detection circuit generates a frequency skip signal in response to the drive signal to indicate when an intended frequency of the drive signal is within an audible noise frequency window. A state of the current limit signal fixed when the intended frequency of the drive signal is within the audible noise frequency window. A first latch generates a hold signal to control the current limit generator to hold the current limit signal in response to the frequency skip signal and the feedback signal.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: February 13, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Vikram Balakrishnan, Giao Minh Pham, Ricardo Luis Janezic Pregitzer, Peter Vaughan
  • Patent number: 9876433
    Abstract: A controller for use in a power converter includes a drive circuit coupled to generate a drive signal to control switching of a power switch of the power converter in response to a feedback signal to control a transfer of energy from an input to an output of the power converter. An audible noise window circuit is coupled to generate a frequency skip signal in response to the feedback signal. The frequency skip signal is activated in response to a frequency of a feedback request signal responsive to the feedback signal being within an audible noise window. An audible noise reduction circuit is coupled to output a reduction signal in response to the frequency skip signal. The drive circuit is coupled to generate the drive signal in response to the reduction signal from the audible noise reduction circuit.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: January 23, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Ricardo Luis Janezic Pregitzer, Peter Vaughan
  • Patent number: 9871510
    Abstract: A cascode switch circuit includes a normally-on device cascode coupled to a normally-of device between first and second terminals of the cascode switch circuit. A leakage clamp circuit is coupled between first and second terminals of the normally-off device. The leakage clamp circuit is coupled to clamp a voltage at an intermediate terminal between the normally-on device and the normally-off device at a threshold voltage level. The leakage clamp circuit is further coupled to clamp a voltage between the second terminal of the normally-on device and the control terminal of the normally-on device at the threshold voltage level to keep the normally-on device off when the normally-on device and the normally-off device are off.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: January 16, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Hartley Horwitz, Sorin Georgescu, Kuo-Chang Robert Yang
  • Patent number: 9866125
    Abstract: An ac-dc power converter controller includes a switch driver circuit coupled to generate a drive signal to control switching of a power switch to control a transfer of energy from an input of the power converter to an output of the power converter. An input sense circuit is coupled to receive an input sense signal representative of the input of a power converter. A sense enable circuit is coupled to generate a sense enable signal in response to the drive signal. The sense enable signal is coupled to control the input sense circuit to sense the input sense signal for an extended duration of time after the power switch turns OFF.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: January 9, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Zhao-Jun Wang, Giao Minh Pham, Roland Sylvere Saint-Pierre
  • Patent number: 9866122
    Abstract: A boost-bypass converter includes a boost inductor coupled between an input and an output of the boost-bypass converter. A bypass diode is coupled between the input the output of the boost-bypass converter. A boost switching element is coupled to the boost inductor, and is coupled to be activated during a first interval in each line half cycle of an input voltage to boost an output voltage at the output of the boost-bypass converter. The boost switching element is coupled to be deactivated during a second interval in said each line half cycle such that the output voltage drops towards the input voltage. The output voltage is coupled to follow the input voltage during a third interval in said each line half cycle of the input voltage. Energy is transferred between the input and the output of the boost-bypass converter through the bypass diode during the third interval.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: January 9, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Antonius Jacobus Johannes Werner, Matthew David Waterson
  • Patent number: 9853552
    Abstract: A method of operating a power converter includes applying a first signal sequence to one or more terminals of the power converter to unlock a controller of the power converter and cause the controller to enter a programming mode, applying a second signal sequence to the one or more terminals of the power converter to program a controller parameter of the power converter, and applying a third signal sequence to the one or more terminals to lock the controller of the power converter and cause the power converter to enter a locked mode. The one or more terminals of the power converter includes one or more input terminals of the power converter that converter are adapted to be coupled to a programmable ac or dc supply, or one or more output terminals of the power converter that are adapted to be coupled to a programmable electronic load.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: December 26, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Clifford James Walker, David Michael Hugh Matthews
  • Patent number: 9847732
    Abstract: A controller for a use with a power converter includes a sensor coupled to sense a signal on a secondary side of the power converter. The sensor is coupled to detect a turn off of a power switch on a primary side of the power converter. A charge source is coupled to charge a control terminal of a synchronous rectifier on the secondary side of the power converter in response to said detection of the turn off of the power switch to a voltage beyond a threshold voltage of the synchronous rectifier to allow the synchronous rectifier to conduct a current of the secondary winding. A linear amplifier having an output is coupled to sink current from the control terminal of the synchronous rectifier in response to a difference between a voltage across the synchronous rectifier and an amplifier reference value.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: December 19, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Adrian Lefedjiev, Toine Werner
  • Patent number: 9837911
    Abstract: A controller for use in a power converter includes a drive circuit coupled to generate a drive signal to control switching of a power switch to control a transfer of energy from a power converter input to a power converter output. An input for receiving an enable signal including enable events is responsive to the power converter output. The drive circuit is coupled to turn ON the power switch in response to the enable events and turn OFF the power switch in response to a power switch current reaching a current limit threshold. A current limit threshold generator is coupled to receive the enable events and vary the current limit threshold in response to the enable events of the enable signal.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: December 5, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Roland Sylvere Saint-Pierre, Giao Minh Pham, Lance M. Wong
  • Patent number: 9831188
    Abstract: An integrated circuit package includes an encapsulation and a lead frame with a portion of the lead frame disposed within the encapsulation. The lead frame includes first and second conductive loops. A first voltage is induced between first and second ends of the first conductive loop in response to an external magnetic field that passes through the integrated circuit package. A second voltage is induced between third and fourth ends of the second conductive loop of the lead frame in response to the external magnetic field that passes through the integrated circuit package. The first conductive loop is coupled to the second conductive loop such that the first voltage between the first and second ends combined with the second voltage between the third and fourth ends substantially cancel.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: November 28, 2017
    Assignee: Power Integrations, Inc.
    Inventors: David Kung, David Michael Hugh Matthews, Balu Balakrishnan
  • Patent number: 9812973
    Abstract: A method for controlling a power converter switch to regulate power delivered to an output of a power converter includes operating the power converter switch in first, second, and third duty cycle control modes in response to a feedback signal. The first duty cycle control mode includes modulating a peak switch current of the power converter switch in response to the feedback signal, and switching the power converter switch at a substantially fixed first switching frequency value. The second duty cycle control mode includes modulating the switching frequency in response to the feedback signal, and maintaining the peak switch current substantially at a peak switch current threshold value. The third duty cycle control mode includes modulating the peak switch current of the power converter switch in response to the feedback signal, and switching the power converter switch at a substantially fixed second switching frequency value.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: November 7, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Stefan Bäurle, Giao Pham
  • Patent number: 9804205
    Abstract: A method for sensing the current in a high-electron-mobility transistor (HEMT) that compensates for changes in a drain-to-source resistance of the HEMT. The method includes receiving a sense voltage representative of the current in the HEMT, receiving a compensation signal representative of a drain-to-source voltage of the HEMT, and outputting as a compensated sense voltage a linear combination of the sense voltage and the compensation signal.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: October 31, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Rajko Duvjnak, William M. Polivka
  • Patent number: 9780666
    Abstract: A switch mode power converter includes a primary side, an energy transfer element, and a secondary side. The secondary side includes output terminals coupled to a load and an output capacitance across the output terminals. The secondary side further includes a compensation signal generator—configured to generate a compensation signal. The compensation signal compensates charging the output capacitance with power transferred from the primary side to the secondary side. The secondary side further includes computational circuitry configured to output an adjusted compensation signal that compensates, based on the compensation signal, one of an output sense signal representative of an output signal at the output terminals and a reference signal representative of a desired output voltage of the switch mode power converter. The secondary side further includes a comparator to compare the adjusted compensation signal with the other one of the output sense signal and the reference signal.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: October 3, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Arthur B. Odell, Vikram Balakrishnan, Roland S. Saint-Pierre, Jr.
  • Patent number: 9774268
    Abstract: A method for controlling an output of a power converter includes switching a switching element with drive signals that are generated for switching a switching element during normal operation when an energy requirement of one or more loads at the output are above a low-load threshold. A non-regulated dormant mode of operation is entered when the flow of energy to the output is detected to be less than the low-load threshold value for more than a first period of time. The control circuit is powered down when in the non-regulated dormant mode of operation the control circuit is unresponsive to stop regulating the flow of energy to the output of the power converter. The control circuit remains in the non-regulated dormant mode of operation for a second period of time before powering up again to resume generating the drive signal and regulating the flow of energy.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: September 26, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Alex B. Djenguerian, Leif Lund
  • Patent number: 9774248
    Abstract: A controller for use in a power converter includes a switch controller coupled to a power switch coupled to an energy transfer element. The switch controller is coupled to receive a current sense signal representative of a drain current through the power switch. The switch controller is coupled to generate a drive signal to control switching of the power switch in response to the current sense signal and a modulated current limit signal to control a transfer of energy from an input to an output of the power converter. A current limit generator is coupled to generate a current limit signal. A jitter generator is coupled to generate a jitter signal. An arithmetic operator circuit is coupled to generate the modulated current limit signal in response to the current limit signal and the jitter signal.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 26, 2017
    Assignee: Power Integrations, Inc.
    Inventors: Roland Sylvere Saint-Pierre, Giao Minh Pham, Lance M. Wong, David Michael Hugh Matthews