Patents Assigned to Power Intergrations, Inc.
  • Patent number: 10079543
    Abstract: An integrated circuit package includes an electromagnetic communication link formed by a portion of a lead frame within an encapsulation. The lead frame includes a first conductor forming a first conductive loop a second conductor forming a second conductive loop galvanically isolated from the first conductive loop. The second conductive loop is magnetically coupled to the first conductive loop to provide a magnetic communication link between the first and second conductors. A first transceiver circuit includes a transmit circuit coupled to the first conductive loop. A second transceiver circuit includes a receive circuit coupled to the second conductive loop. A signal transmitted from the transmit circuit included in first transceiver circuit and coupled to the first conductor is coupled to be magnetically communicated through the magnetic communication link to the receive circuit included in second transceiver circuit and coupled to the second conductor.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: September 18, 2018
    Assignee: Power Intergrations, Inc.
    Inventors: Balu Balakrishnan, David Michael Hugh Matthews
  • Patent number: 9866108
    Abstract: A power converter includes a front end stage having a power factor correction controller, an output stage with a DC/DC controller, and light load detection circuitry coupled to detect relatively low power consumption by a load on an output of the output stage. In response to the detection, the power factor correction controller in the front end stage is turned off.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: January 9, 2018
    Assignee: Power Intergrations, Inc.
    Inventors: Robert J. Mayell, Bala Sudhakar Singamaneni
  • Patent number: 9621019
    Abstract: A controller includes a multiplier block that is coupled to receive an input voltage signal, an input current signal, and an output voltage signal that are representative of a power conversion system. The multiplier block outputs a multiplier block output signal responsive to a product of the input voltage signal and the input current signal divided by the output voltage signal. A signal discriminator outputs a error signal responsive to the multiplier block output signal. The error signal is representative of a difference between a portion of the multiplier block output signal that is greater than a reference signal and a portion of the multiplier block output signal that is less than or equal to the reference signal. A switch controller generates a drive signal responsive to the error signal to control switching of a power switch to regulate an average output current of the power conversion system.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: April 11, 2017
    Assignee: Power Intergrations, Inc.
    Inventors: Michael Yue Zhang, Ricardo Luis Janezic Pregitzer, Mingming Mao, Tiziano Pastore
  • Patent number: 8487601
    Abstract: An example power factor correction (PFC) converter includes an energy transfer element, a power switch, and a controller. The controller includes an integrator and on/off logic. The integrator generates an integrator output signal in response to a voltage sense signal and a current sense signal. The on/off logic drives the power switch on and off to control a transfer of energy through the energy transfer element to an output of the PFC converter and terminates an on time of the power switch when the integrator output signal reaches a threshold value. A gain of the integrator is adjusted in response to the voltage sense signal such that the threshold value is substantially constant independent of the magnitude of the ac voltage source when a load condition at the output of the PFC converter is constant.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 16, 2013
    Assignee: Power Intergrations, Inc.
    Inventor: Roland Sylvere Saint-Pierre
  • Patent number: 8179166
    Abstract: A sample and hold circuit with leakage compensation is disclosed. An example sample and hold circuit includes a first switch coupled to sample and hold an input signal value in a first capacitor coupled to the first switch in response to a sample signal. A second switch through which a second leakage current flows to a second capacitor coupled to the second switch is also included. The second leakage current through the second switch to the second capacitor is substantially equal to a first leakage current through the first switch to the first capacitor. An offset circuit that is coupled to the first and second capacitors is also included to produce a compensated sampled value in response to a difference between a quantity representing the held input signal value and charge accumulated in the first capacitor in response to the first leakage current from a quantity representing charge accumulated in the second capacitor in response to the second leakage current.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: May 15, 2012
    Assignee: Power Intergrations, Inc.
    Inventor: Zhao-Jun Wang
  • Patent number: 7999606
    Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: August 16, 2011
    Assignee: Power Intergrations, Inc.
    Inventors: David Kung, Leif Lund
  • Patent number: 7696737
    Abstract: A power supply control circuit is disclosed. In one aspect, a power supply control circuit includes a controller to be coupled to a switch to regulate an output of a power supply in response to a feedback signal and a parameter change signal. A parameter response circuit is coupled to generate the parameter change signal in response to a difference between a first value of a parameter measured before an event and a second value of the parameter measured after the event. The difference between the first value of the parameter and the second value of the parameter is representative of the relative efficiency of the power supply.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: April 13, 2010
    Assignee: Power Intergrations, Inc.
    Inventor: William M. Polivka
  • Patent number: 7593242
    Abstract: Techniques are disclosed to extend an on time period of switch to regulate a transfer of energy from an input of a power supply to an output of a power supply. One example integrated circuit includes an energy transfer element coupled between an input and an output of the power supply. A switch is coupled to the input of the energy transfer element. A controller is coupled to the switch to control switching of the switch to regulate a transfer of energy from the input of the power supply to the output of the power supply in response to a feedback signal received from the output of the power supply. The controller is coupled to limit a maximum on time period of the switch a first maximum on time period in response to a first range of power supply operating conditions and to a second maximum on time period for a second range of power supply operating conditions.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: September 22, 2009
    Assignee: Power Intergrations, Inc.
    Inventors: Chan Woong Park, Alex B. Djenguerian, Kent Wong
  • Patent number: 7521908
    Abstract: A switching regulator utilizing on/off control that reduces audio noise at light loads by adjusting the current limit of the switching regulator. In one embodiment, a switching regulator includes a state machine that adjusts the current limit of the switching regulator based on a pattern of feedback signal values from the output of the power supply for a preceding N cycles of the drive signal. The state machine adjusts the current limit lower at light loads such that cycles are not skipped to reduce the operating frequency of the switching regulator into the audio frequency range until the flux density through the transformer is sufficiently low to reduce the generation of audio noise.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: April 21, 2009
    Assignee: Power Intergrations, Inc.
    Inventors: Balu Balakrishnan, Alex B. Djenguerian, Kent Wong
  • Publication number: 20070293002
    Abstract: A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls partially filling each of the trenches with a dielectric material that covers the first and second sidewalls. The remaining portions of the trenches are then filled with a conductive material to form first and second field plates. Source and body regions are formed in an upper portion of the mesa, with the body region separating the source from a lower portion of the mesa. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Application
    Filed: May 29, 2007
    Publication date: December 20, 2007
    Applicant: Power Intergrations, Inc.
    Inventor: Donald Disney
  • Patent number: 6815293
    Abstract: A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. The layered structure may be fabricated in a variety of orientations. A MOSFET structure may be incorporated into the device adjacent to the source region, or, alternatively, the MOSFET structure may be omitted to produce a high-voltage transistor structure having a stand-alone drift region. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: November 9, 2004
    Assignee: Power Intergrations, Inc.
    Inventors: Donald Ray Disney, Amit Paul
  • Patent number: 6788514
    Abstract: Methods and apparatuses for fault condition protection of a switched mode power supply. In one aspect of the invention, a power supply circuit having an auto-restart function to turn the power supply on and off repeatedly under fault conditions is included. In one embodiment, one or more off-times following detection of a fault condition is smaller than subsequent off-times.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 7, 2004
    Assignee: Power Intergrations, Inc.
    Inventor: Balu Balakrishnan
  • Patent number: 6635544
    Abstract: A method for fabricating a high-voltage transistor with an extended drain region includes forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer. A dielectric layer Is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining portions of the trenches are then filled with a conductive material to form first and second field plate members that are insulated from the substrate and the epitaxial layer.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: October 21, 2003
    Assignee: Power Intergrations, Inc.
    Inventor: Donald Ray Disney