Patents Assigned to PowerStor
  • Patent number: 6524707
    Abstract: Provided is a technique in which a carbon structure is first coated with a tie layer as a intermediate prior to the deposition of metal on a carbon substrate. The tie layer is composed of a material with structural and chemical affinity for both carbon and metal. Capacitor electrodes formed according to this technique show very low Equivalent Series Resistance (ESR) and improved capacitance at high frequencies.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: February 25, 2003
    Assignee: PowerStor Corporation
    Inventor: Paul S. Rasmussen
  • Patent number: 6493209
    Abstract: Provided are electrochemical capacitor cells that provide direct external electrical connection to their electrodes and methods for their manufacture. These cells are lightweight, simple and inexpensive to manufacture, and versatile. They may be used alone or they may be stacked to form bipolar stacked capacitors.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: December 10, 2002
    Assignee: PowerStor Corporation
    Inventors: Hundi P. Kamath, Paul S. Rasmussen, Daniel M. Manoukian
  • Publication number: 20020167785
    Abstract: Provided are electrochemical (e.g., double layer capacitor) cell designs, and methods of their manufacture, which reduce both cell size and impedance while maintaining inter-electrode dielectric integrity and cell performance and facilitating manufacturing. The designs adapt mircofabrication techniques from the field of semiconductor fabrication in order to form and pattern thin dielectric films on electrodes. Existing microfabrication techniques allow for the formation of dielectric (e.g., polyimide) films having a thickness of about 1 to 2 microns. Dielectric films formed on electrodes may be patterned according to well known procedures in the semiconductor fabrication field to provide area for unimpeded ion exchange between the electrodes. The patterning may produce contiguous or noncontiguous dielectric layers between the electrodes having porosity of about 30 to 80%, preferably about 60 to 80% while dielectric integrity is maintained.
    Type: Application
    Filed: May 6, 2002
    Publication date: November 14, 2002
    Applicant: PowerStor
    Inventor: Hundi P. Kamath
  • Publication number: 20020163772
    Abstract: Provided are electrochemical (e.g., double layer capacitor) cell designs and methods of their manufacture, which reduce cell impedance and increase volumetric capacitance while maintaining inter-electrode dielectric integrity and cell performance. The designs eliminate the contiguous separator material used as the dielectric between the electrodes in conventional double layer capacitor cells. The separator is replaced by a noncontiguous array of dielectric particles, such as glass beads or fibers, sized and distributed to provide substantially uniform separation between the electrodes. The remaining space between the electrodes unoccupied by the dielectric particles is filled with electrolyte. In this way, a much greater proportion of the dielectric space between the electrodes is available for ionic transport. Glass beads and fibers are available with diameters less than that available for currently-used separator materials.
    Type: Application
    Filed: May 6, 2002
    Publication date: November 7, 2002
    Applicant: PowerStor
    Inventor: Hundi P. Kamath