Abstract: A payment terminal, including: a display, an input device configured to generate input signals indicative of a user input, a payment instrument reader configured to receive payment instrument data from a financial payment instrument, a secure processor connected to the payment instrument reader, a main processor connected to the display, the main processor separate and distinct from the secure processor, a secure input processor connected to the input device and the secure processor, wherein the secure processor is operable between an unsecured mode, wherein the secure processor sends input coordinates based on the input signals received from the secure input processor to the main processor; and a secured mode, wherein the secure input processor ceases input coordinate forwarding to the main processor.

Abstract: A method of payment terminal operation, including: receiving a payment collection request for a payment from an application, generating a payment initiation request for the payment, sending the payment initiation request to a secure processing system, switching the secure processing system from operation in an unsecured mode to operation in a secured mode in response to receipt of the payment initiation request, facilitating payment information entry, and receiving a payment response notification, generated based on the payment information, at the main processor.

Abstract: A payment terminal, including: a display, an input device configured to generate input signals indicative of a user input, a payment instrument reader configured to receive payment instrument data from a financial payment instrument, a secure processor connected to the payment instrument reader, a main processor connected to the display, the main processor separate and distinct from the secure processor, a secure input processor connected to the input device and the secure processor, wherein the secure processor is operable between an unsecured mode, wherein the secure processor sends input coordinates based on the input signals received from the secure input processor to the main processor; and a secured mode, wherein the secure input processor ceases input coordinate forwarding to the main processor.