Abstract: An electronic device is disclosed that comprises a substrate and an electronic circuit with a layer between them. The layer comprises an electrically insulating medium containing a spatial distribution of conductive elements. The electronic circuit comprises memory contacts arranged for electrical connection to a corresponding contact on the substrate when at least one of the conductive element forms a connection between a memory contact and the corresponding contact but for electrical insulation from the corresponding contact when no conductive elements forms such a connection. A selection of the memory contacts, that is at least partially random, is thus electrically connected to the corresponding contact on the substrate. Memory circuitry is configured to store a representation of a respective electrical connection status of the memory contacts.

Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.

Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.

Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the movable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.

Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the movable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.

Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.

Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.

Abstract: An antenna comprises: a first terminal; a second terminal; and a winding, having an inductance, comprising a plurality of turns and connected between the first and second terminals such that a change in magnetic flux linking the winding generates a corresponding voltage between said terminals. The winding comprises a conductive element connected to the first and second terminals and extending around said turns from the first terminal to the second terminal and having a thickness not exceeding X ?m along a length of the conductive element from the first to the second terminal and a width not exceeding X ?m along said length, where X is less than or equal to 10, whereby said conductive element is substantially non-visible to a naked human eye.

Abstract: An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail.

Abstract: A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.

Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.

Abstract: A transistor includes a substrate, a source terminal and a drain terminal, each terminal being supported by the substrate, and the source and drain terminal being separated by a portion of the substrate, a layer of semiconductive material deposited so as to cover the portion of the substrate and to connect the source terminal to the drain terminal, a layer of dielectric material deposited so as to cover at least a portion of the layer of semiconductive material, and a layer of electrically conductive material deposited so as to cover at least a portion of the layer of dielectric material. The layer of electrically conductive material providing a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the source and drain terminals.

Abstract: A method for use in the manufacture of an electronic circuit comprising at least one substantially planar electronic device is disclosed.

Abstract: An electronic device includes a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the first and second substrate areas being connected by an elongate channel defined by the insulative features, the channel providing a charge carrier flow path in the substrate from the first area to the second area, the conductivity between the first and second substrate areas being dependent upon the potential difference between the areas. The mobile charge carriers can be within at least two modes in each of the three dimensions within the substrate. The substrate can be an organic material. The mobile charge carriers can have a mobility within the range 0.01 cm2/Vs to 100 cm2/Vs, and the electronic device may be an RF device. Methods for forming such devices are also described.

Abstract: A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.

Abstract: An electronic device includes a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the first and second substrate areas being connected by an elongate channel defined by the insulative features, the channel providing a charge carrier flow path in the substrate from the first area to the second area, the conductivity between the first and second substrate areas being dependent upon the potential difference between the areas. The mobile charge carriers can be within at least two modes in each of the three dimensions within the substrate. The substrate can be an organic material. The mobile charge carriers can have a mobility within the range 0.01 cm2/Vs to 100 cm2/Vs, and the electronic device may be an RF device. Methods for forming such devices are also described.

Abstract: An electronic device includes a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the first and second substrate areas being connected by an elongate channel defined by the insulative features, the channel providing a charge carrier flow path in the substrate from the first area to the second area, the conductivity between the first and second substrate areas being dependent upon the potential difference between the areas. The mobile charge carriers can be within at least two modes in each of the three dimensions within the substrate. The substrate can be an organic material. The mobile charge carriers can have a mobility within the range 0.01 cm2/Vs to 100 cm2/Vs, and the electronic device may be an RF device. Methods for forming such devices are also described.