Patents Assigned to Pragmatic Printing Ltd
  • Patent number: 10811383
    Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller; transferring said ICs from the first roller onto a second roller; and transferring said ICs from the second roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: October 20, 2020
    Assignee: PRAGMATIC PRINTING LTD.
    Inventors: Neil Davies, Richard David Price, Stephen Devenport, Stuart Philip Speakman
  • Patent number: 10812059
    Abstract: A comparator is disclosed, for comparing a first input voltage with a second input voltage and generating a corresponding output voltage. The comparator includes a follower stage coupled to a first supply rail and a second supply rail, a follower stage input terminal for the second input voltage, and a follower stage output terminal. The comparator also includes an inverter stage comprising a first inverter stage supply terminal coupled to the first supply rail, a second inverter stage supply terminal coupled to the follower stage output terminal, an inverter stage input terminal for the first input voltage, and an inverter stage output terminal for providing an inverter stage output voltage having a first range. A signal conditioning means is coupled to the inverter stage output terminal and generates a comparator output voltage at a comparator output terminal having a second range larger than the first range.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: October 20, 2020
    Assignee: Pragmatic Printing LTD
    Inventor: Joao De Oliveira
  • Patent number: 10622068
    Abstract: A method of manufacturing an electronic circuit comprises: providing an electronic circuit having a first configuration in which the circuit comprises a resistive element having a first resistance, and irradiating at least a part of the resistive element with electromagnetic radiation to change the resistance of the resistive element from the first resistance to a second resistance, the second resistance being lower than the first resistance. A method of storing data comprises: receiving a piece of data to be stored; determining a number according to the data; and irradiating at least part of a resistive element with that number of pulses of electromagnetic radiation to change a resistance of the resistive element from a first resistance to a second resistance, the second resistance being lower than the first resistance. A difference between the first resistance and the second resistance is dependent on the number. Corresponding circuits and data storage systems are disclosed.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: April 14, 2020
    Assignee: PRAGMATIC PRINTING LTD
    Inventors: Richard Price, Catherine Ramsdale
  • Patent number: 10204683
    Abstract: A method of manufacturing an electronic circuit comprises: providing an electronic circuit having a first configuration in which the circuit comprises a resistive element having a first resistance, and irradiating at least a part of the resistive element with electromagnetic radiation to change the resistance of the resistive element from the first resistance to a second resistance, the second resistance being lower than the first resistance. A method of storing data comprises: receiving a piece of data to be stored; determining a number according to the data; and irradiating at least part of a resistive element with that number of pulses of electromagnetic radiation to change a resistance of the resistive element from a first resistance to a second resistance, the second resistance being lower than the first resistance. A difference between the first resistance and the second resistance is dependent on the number. Corresponding circuits and data storage systems are disclosed.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: February 12, 2019
    Assignee: Pragmatic Printing Ltd.
    Inventors: Richard Price, Catherine Ramsdale
  • Patent number: 9978600
    Abstract: A method of manufacturing an electronic device comprises: providing a layer of semiconductor material comprising a first portion, a second portion, and a third portion, the third portion connecting the first portion to the second portion and providing a semiconductive channel for electrical current flow between the first and second portions; providing a gate terminal arranged with respect to said third portion such that a voltage may be applied to the gate terminal to control an electrical conductivity of said channel; and processing at least one of the first and second portions so as to have an electrical conductivity greater than an electrical conductivity of the channel when no voltage is applied to the gate terminal. In certain embodiments, the processing comprises exposing at least one of the first and second portions to electromagnetic radiation. The first and second portions may be laser annealed to increase their conductivities.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: May 22, 2018
    Assignee: Pragmatic Printing Ltd.
    Inventors: Richard Price, Catherine Ramsdale
  • Publication number: 20170278945
    Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.
    Type: Application
    Filed: November 7, 2016
    Publication date: September 28, 2017
    Applicant: Pragmatic Printing Ltd
    Inventors: John James Gregory, Richard David Price
  • Publication number: 20170264000
    Abstract: An antenna comprises: a first terminal; a second terminal; and a winding, having an inductance, comprising a plurality of turns and connected between the first and second terminals such that a change in magnetic flux linking the winding generates a corresponding voltage between said terminals. The winding comprises a conductive element connected to the first and second terminals and extending around said turns from the first terminal to the second terminal and having a thickness not exceeding X?m along a length of the conductive element from the first to the second terminal and a width not exceeding X?m along said length, where X is less than or equal to 10, whereby said conductive element is substantially non-visible to a naked human eye.
    Type: Application
    Filed: November 28, 2014
    Publication date: September 14, 2017
    Applicant: Pragmatic Printing Ltd
    Inventor: Joao de Oliveira
  • Patent number: 9530649
    Abstract: A method of manufacturing an electronic device comprises: providing a layer of semiconductor material comprising a first portion, a second portion, and a third portion, the third portion connecting the first portion to the second portion and providing a semiconductive channel for electrical current flow between the first and second portions; providing a gate terminal arranged with respect to said third portion such that a voltage may be applied to the gate terminal to control an electrical conductivity of said channel; and processing at least one of the first and second portions so as to have an electrical conductivity greater than an electrical conductivity of the channel when no voltage is applied to the gate terminal. In certain embodiments, the processing comprises exposing at least one of the first and second portions to electromagnetic radiation. The first and second portions may be laser annealed to increase their conductivities.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: December 27, 2016
    Assignee: Pragmatic Printing Ltd.
    Inventors: Richard Price, Catherine Ramsdale
  • Patent number: 9425193
    Abstract: A method of manufacturing a transistor comprising: providing a substrate, a region of semiconductive material supported by the substrate, and a region of electrically conductive material supported by the region of semiconductive material; forming at least one layer of resist material over said regions to form a covering of resist material over said regions; forming a depression in a surface of the covering of resist material, said depression extending over a first portion of said region of conductive material, said first portion separating a second portion of the conductive region from a third portion of the conductive region; removing resist material located under said depression so as to form a window, through said covering, exposing said first portion of the electrically conductive region; removing said first portion to expose a connecting portion of the region of semiconductive material, said connecting portion connecting the second portion to the third portion of the conductive region; forming a layer of
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: August 23, 2016
    Assignee: Pragmatic Printing Ltd
    Inventors: Richard Price, Scott White
  • Publication number: 20160173099
    Abstract: An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail.
    Type: Application
    Filed: July 16, 2014
    Publication date: June 16, 2016
    Applicant: Pragmatic Printing Ltd
    Inventors: Joao de Oliveira, Scott Darren White, Catherine Ramsdale
  • Publication number: 20160020299
    Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.
    Type: Application
    Filed: February 13, 2013
    Publication date: January 21, 2016
    Applicant: Pragmatic Printing Ltd
    Inventors: John James Gregory, Richard David Price
  • Patent number: 9123894
    Abstract: A method of manufacturing an electronic device, comprising a layer of semiconductive material and at least one insulative feature arranged to interrupt the layer of semiconductive material, comprises: providing a layer of semiconductive material, and a layer of compressible material supporting the layer of semiconductive material; and forming the or each insulative feature by a method comprising displacing a respective selected portion of the layer of semiconductive material towards the compressible material so as to compress compressible material under the or each displaced portion and separate at least partly the or each displaced portion from undisplaced semiconductive material.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: September 1, 2015
    Assignee: Pragmatic Printing Ltd.
    Inventors: Aimin Song, Stephen Whitelegg, Yanming Sun, Shiwei Lin
  • Patent number: 9018096
    Abstract: A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: April 28, 2015
    Assignee: Pragmatic Printing Ltd.
    Inventors: Richard David Price, Ian Barton
  • Publication number: 20140191331
    Abstract: A method of manufacturing a transistor comprising: providing a substrate, a region of semiconductive material supported by the substrate, and a region of electrically conductive material supported by the region of semiconductive material; forming at least one layer of resist material over said regions to form a covering of resist material over said regions; forming a depression in a surface of the covering of resist material, said depression extending over a first portion of said region of conductive material, said first portion separating a second portion of the conductive region from a third portion of the conductive region; removing resist material located under said depression so as to form a window, through said covering, exposing said first portion of the electrically conductive region; removing said first portion to expose a connecting portion of the region of semiconductive material, said connecting portion connecting the second portion to the third portion of the conductive region; forming a layer of
    Type: Application
    Filed: June 22, 2012
    Publication date: July 10, 2014
    Applicant: Pragmatic Printing Ltd
    Inventors: Richard Price, Scott White