Abstract: The invention relates to NPN and PNP bipolar transistors and to a method for the production thereof, said transistors being characterised by a particularly high collector-emitter and collector-base blocking voltage. The blocking voltage is increased by a particular doping profile. An NPN bipolar transistor comprises a p-doped substrate (1), a trenched n-doped layer (3) forming the collector, a p-doped layer (7) which is arranged above the trenched n-doped layer and is made of a base and an n-doped layer which is arranged within the p-doped layer and forms an emitter of the transistor. A spatial charge area (RLZ 1) is formed between the p-doped layer and the trenched n-doped layer and a second spatial charge area (RLZ 2) is formed between the trenched n-doped layer and the p-doped substrate, which expands in the vertical direction on the collector when the transistor is operated with an increasing potential.
Type:
Grant
Filed:
March 24, 2005
Date of Patent:
July 21, 2009
Assignee:
Prema-Semiconductor GmbH
Inventors:
Hartmut Grützediek, Michael Rammensee, Joachim Scheerer
Abstract: A method for fabricating integrable PMOSFET semiconductor structures in a P-doped substrate which are distinguished by a high dielectric strength is provided. In order to fabricate the PMOSFET semiconductor structure, a mask is applied to a semiconductor substrate for the definition of a window delimited by a peripheral edge. An N-doped well is thereupon produced in the P-doped semiconductor substrate by means of high-voltage ion implantation through the window delimited by the mask, the edge zone of said N-doped well reaching as far as the surface of the semiconductor substrate. The individual regions for the source, drain and bulk of the PMOSFET semiconductor structure are then produced in the P-doped inner zone enclosed by the well. The P-doped inner zone forms the drift zone of the PMOSFET structure. Since the drift zone has the weak basic doping of the substrate, the PMOSFET has a high dielectric strength.
Abstract: A method for fabricating integrable PMOSFET semiconductor structures in a P-doped substrate which are distinguished by a high dielectric strength is provided. In order to fabricate the PMOSFET semiconductor structure, a mask is applied to a semiconductor substrate for the definition of a window delimited by a peripheral edge. An N-doped well is thereupon produced in the P-doped semiconductor substrate by means of high-voltage ion implantation through the window delimited by the mask, the edge zone of said N-doped well reaching as far as the surface of the semiconductor substrate. The individual regions for the source, drain and bulk of the PMOSFET semiconductor structure are then produced in the P-doped inner zone enclosed by the well. The P-doped inner zone forms the drift zone of the PMOSFET structure. Since the drift zone has the weak basic doping of the substrate, the PMOSFET has a high dielectric strength.