Abstract: A test probe ring for semiconductor devices is disclosed which contains a ground plane layer, an insulating layer and a layer of electrically separate conductors. A centrally located opening in the layered assembly has a plurality of layered fingers carrying the inner ends of the conductors. A pattern of contact bumps on the free ends of the fingers provides a co-planar pattern of conductor contacts which match a pattern of semiconductor device test pads. The fingers and contacts are formed by cutting kerfs between the conductors at the periphery of the centrally located opening.

Abstract: A test probe ring for semiconductor devices is disclosed which contains a ground plane layer, an insulating layer and a layer of electrically separate conductors. A centrally located opening in the layered assembly has a plurality of layered fingers carrying the inner ends of the conductors. A pattern of contact bumps on the free ends of the fingers provides a co-planar pattern of conductor contacts which match a pattern of semiconductor device test pads. The fingers and contacts are formed by cutting kerfs between the conductors at the periphery of the centrally located opening.