Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A pair of sources for a pair of cells on adjacent word lines each acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor of one cell operates as a charge injector for the other cell. The charge injector provides carriers for substrate hot carrier injection onto a floating gate.

Abstract: An integrated inductive element may be formed over a substrate. A triple well may be defined in a star-shape, in one embodiment, in the substrate beneath the integrated inductive element in order to reduce eddy current losses arising from magnetic coupling between integrated inductors associated with the same integrated circuit.

Abstract: A high performance integrated circuit device enables scaled low voltage transistors to be utilized as transfer gates with improved speed characteristics. At least some of the transistors are formed with thicker gate oxides and boosted positive and negative drive voltages are used with the thicker gate oxide transistors. The transfer gates may be driven by an inverter using a transistor formed in a triple well.

Abstract: An integrated inductive element may be formed over a substrate. A trench may be defined in a variety of shapes in the substrate beneath the integrated inductive element in order to reduce eddy current losses arising from magnetic coupling between integrated inductors associated with the same integrated circuit.

Abstract: An RF circuit may be formed over a triple well that creates two reverse biased junctions. By adjusting the bias across the junctions, the capacitance across the junctions can be reduced, reducing the capacitive coupling from the RF circuits to the substrate, improving the self-resonance frequency of inductors and reducing the coupling of unwanted signals and noise from the underlying substrate to the active circuits and passive components such as the capacitors and inductors. As a result, radio frequency devices, such as radios, cellular telephones and transceivers such as Bluetooth transceivers, logic devices and Flash and SRAM memory devices may all be formed in the same integrated circuit die using CMOS fabrication processes.

Abstract: A radio frequency device may be formed which has high power output and high transistor switching speeds. This may be done by providing thicker gate oxides and a higher supply potential to transistors utilized to form the power amplifier and using thinner gate oxides conventionally associated with high switching speed and advanced process technologies for other applications on the same integrated circuit. Thus, high switching speeds can be achieved-with some transistors which utilize a lower supply voltage and high power output can be achieved from other transistors which are coupled to a higher supply voltage. The different types of transistors may be made in the same integrated circuit fabrication process on the same integrated circuit.

Abstract: An integrated circuit die include a first portion including logic circuits. A second portion of the die includes an EEPROM memory, and a third portion includes a FLASH memory.

Abstract: A nonvolatile memory cell is formed in an embedded P-well without the necessity of including an overlaying control gate. As a result, normal logic process technology may be utilized to form the nonvolatile memory cell. Through the use of substrate hot electron injection and the formation of a lateral bipolar transistor whose emitter acts as a charge injector, programming efficiency is improved and the necessary programming voltages and currents can be reduced from the relatively high voltages and currents used in other devices.

Abstract: An integrated circuit die include a first portion including logic circuits. A second portion of the die includes an EEPROM memory, and a third portion includes a FLASH memory.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A select transistor can have a source which also acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor operates as a charge injector. The charge injector provides electrons for substrate hot electron injection of electrons onto the floating gate for programming. The cell depletion/inversion region may be extended by forming a capacitor as an extension of the control gate over the substrate between the source and channel of said sense transistor.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A select transistor can have a source which also acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor operates as a charge injector. The charge injector provides electrons for substrate hot electron injection of electrons onto the floating gate for programming. The cell depletion/inversion region may be extended by forming a capacitor as an extension of the control gate over the substrate between the source and channel of said sense transistor.

Abstract: A split gate nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A select transistor can have a source which also acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor operates as a charge injector. The charge injector may provide electrons for substrate hot electron injection of electrons onto the floating gate for programming.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A pair of sources for a pair of cells on adjacent word lines each acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor of one cell operates as a charge injector for the other cell. The charge injector provides carriers for substrate hot carrier injection onto a floating gate.

Abstract: A capacitor may be formed by implanting after forming a dielectric and a conductive layer over a semiconductor structure. This diminishes the implant damage to the region underneath the conductive layer. Implanted impurities may be driven under the conductive layer such that two opposed impurity profiles overlap. This forms a junction under the conductive layer.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A select transistor can have a source which also acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor operates as a charge injector. The charge injector provides electrons for substrate hot electron injection of electrons onto the floating gate for programming. The cell depletion/inversion region may be extended by forming a capacitor as an extension of the control gate over the substrate between the source and channel of said sense transistor.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A pair of sources for a pair of cells on adjacent word lines each acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor of one cell operates as a charge injector for the other cell. The charge injector provides carriers for substrate hot carrier injection onto a floating gate.

Abstract: A nonvolatile memory cell which is highly scalable includes a cell formed in a triple wall. The control gate is negatively biased. By biasing the P-well and drain (or source) positively within a particular voltage range when erasing, GIDL current and degradation from a hole trapping can be diminished and hence scalable technology may be achieved.

Abstract: A nonvolatile memory cell is formed in an embedded P-well without the necessity of including an overlaying control gate. As a result, normal logic process technology may be utilized to form the nonvolatile memory cell. Through the use of substrate hot electron injection and the formation of a lateral bipolar transistor whose emitter acts as a charge injector, programming efficiency is improved and the necessary programming voltages and currents can be reduced from the relatively high voltages and currents used in other devices.

Abstract: A nonvolatile memory cell is formed in an embedded P-well without the necessity of including an overlaying control gate. As a result, normal logic process technology may be utilized to form the nonvolatile memory cell. Through the use of substrate hot electron injection and the formation of a lateral bipolar transistor whose emitter acts as a charge injector, programming efficiency is improved and the necessary programming voltages and currents can be reduced from the relatively high voltages and currents used in other devices.

Abstract: A nonvolatile memory cell is formed in an embedded P-well without the necessity of including an overlaying control gate. As a result, normal logic process technology may be utilized to form the nonvolatile memory cell. Through the use of substrate hot electron injection and the formation of a lateral bipolar transistor whose emitter acts as a charge injector, programming efficiency is improved and the necessary programming voltages and currents can be reduced from the relatively high voltages and currents used in other devices.