Abstract: A method of forming a planar silicon nitride layer is disclosed. The method comprises: forming a pad oxide layer; forming a first nitride layer on the pad oxide layer; forming a stop layer on the first nitride layer; forming a second nitride layer on the stop layer; performing intermediate processes that damage the second nitride layer; removing the second nitride layer; removing the stop layer such that the first nitride layer remains as the planar silicon nitride layer.
Type:
Grant
Filed:
November 5, 1999
Date of Patent:
February 13, 2001
Assignees:
ProMOS Tech., Inc., Mosel Vitelic Inc., Infineon Tech. Inc.
Abstract: A method for forming a contact plug that lands on a metal line of an interconnect structure formed on a semiconductor substrate. First, a first insulating layer is formed atop the substrate and between gaps in the interconnect structure. Next, an etching stop layer is formed on the first insulating layer. A second insulating layer is formed atop the etching stop layer. The second insulating layer is patterned and etched, stopping at the etching stop layer, to form a contact opening. The portion of the etching stop layer left exposed by the contact opening is removed. Finally, a barrier metal layer is formed along the walls of the contact opening and a conducting layer is deposited into the contact opening.
Type:
Grant
Filed:
August 25, 1999
Date of Patent:
November 14, 2000
Assignees:
ProMOS Tech., Inc., Mosel Vitelic, Inc., Siemens AG
Inventors:
Chien-chun Wang, Eddie Chiu, Chung-Yi Chen, Hsien-Yuan Chang