Patents Assigned to QC Solutions, Inc.
  • Publication number: 20080182347
    Abstract: A method of in-line characterization of ion implant process, during the SOI bond and cleave manufacturing or engineered silicon layer fabrication. In one embodiment, the method includes the steps of illuminating the engineered donor wafer using a modulated light source; performing a non-contact SPV measurement on the silicon wafer; measuring a dynamic charge (Qd) in response to implant induced crystal damage; and determining the accuracy and uniformity of the value of an implant parameter in response to the dynamic charge. In another embodiment, In another embodiment, the step of determining utilizes the equation VPV?kT?/?Qnet where VPV is photo voltage generated in the implanted wafer, ? is a light flux of the modulated light source, T is temperature of the wafer, and ? is a light modulation frequency of the modulated light source.
    Type: Application
    Filed: December 3, 2007
    Publication date: July 31, 2008
    Applicant: QC Solutions, Inc.
    Inventors: Kenneth Steeples, Adam Bertuch, Edward Tsidilkovski
  • Patent number: 7403023
    Abstract: The invention relates to the use of the metrology methods and the related apparatus disclosed herein that incorporate thermal treatment devices and methods that improve defect detection. Specifically, in one aspect the invention relates to method of thermally treating a semiconductor wafer such that an acceleration of interstitial defect migration is achieved while leaving vacancy defects substantially unaltered.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: July 22, 2008
    Assignee: QC Solutions, Inc.
    Inventors: Kenneth Steeples, Edward Tsidilkovski
  • Publication number: 20080048636
    Abstract: A method and apparatus for thickness measurement of an active layer of a silicon-on-insulator material comprising a layered structure of silicon film, a buried oxide layer and a silicon substrate. In one embodiment, the method comprises the steps of directing a low intensity light of an energy greater than the silicon band-gap on the silicon film, the energy of light sufficient to be substantially absorbed within the silicon film such that the error from the substrate excitation is small compared to the small signal calibration of the apparatus; modifying the surface potential with the chemical treatment, electrical bias or corona, measuring surface photovoltage of the silicon film; and calculating the thickness of the silicon film in response to a non-contact photovoltage measurement of the semiconductor layered structure.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 28, 2008
    Applicant: QC Solutions, Inc.
    Inventors: Edward Tsidilkovski, Kenneth Steeples
  • Publication number: 20080036464
    Abstract: A probe adapted for characterization of a semiconductor wafer having a surface. In one embodiment, the probe includes a source of modulated light; an optical fiber in optical communication with the source of modulated light, the optical fiber having a face and comprises a fiber core; and a transparent conductive layer coating the face of the optical fiber. Light from the source of modulated light is directed along the fiber core of the optical fiber through the face of the optical fiber to the surface of the semiconductor wafer. The optically transparent conductive layer detects charges from the surface of the semiconductor wafer.
    Type: Application
    Filed: July 27, 2007
    Publication date: February 14, 2008
    Applicant: QC Solutions, Inc.
    Inventors: Kenneth Steeples, Edward Tsidilkovski, William Goldfarb
  • Publication number: 20080020549
    Abstract: A method and apparatus for forming an oxide layer on semiconductors using a combination of ultraviolet rays and heat. The apparatus comprises a chamber having a top surface and a bottom surface and defining a wafer holding cavity; an ultraviolet source at the top surface of said chamber; an infrared source at the bottom surface of the chamber; and an oxygen gas inlet for passing oxygen gas through the chamber. Oxygen gas entering the chamber through the oxygen gas inlet is ionized by ultraviolet rays from the ultraviolet source and reacts with the silicon wafer to create an oxide layer on the silicon wafer in the cavity. Infrared radiation from the infrared source heats the silicon wafer to accelerate the creation of the oxide layer on said silicon wafer.
    Type: Application
    Filed: July 20, 2006
    Publication date: January 24, 2008
    Applicant: QC Solutions, Inc.
    Inventors: Edward Tsidilkovski, Kenneth Steeples
  • Patent number: 7160742
    Abstract: The invention relates to a method for real-time in-situ implantation and measurement incorporating a feedback loop to adjust the implantation dose of a substrate during the manufacturing and testing of semiconductor wafers. During processing, the substrate, such as a silicon wafer, is transported between a measuring device and an implantation device multiple times to ensure that where the beam from the implantation device hits the substrate, the doping concentration falls within the range of desired parameters.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: January 9, 2007
    Assignee: QC Solutions, Inc.
    Inventor: Kenneth Steeples
  • Publication number: 20060279311
    Abstract: The invention relates to the use of the metrology methods and the related apparatus disclosed herein that incorporate thermal treatment devices and methods that improve defect detection. Specifically, in one aspect the invention relates to method of thermally treating a semiconductor wafer such that an acceleration of interstitial defect migration is achieved while leaving vacancy defects substantially unaltered.
    Type: Application
    Filed: March 14, 2006
    Publication date: December 14, 2006
    Applicant: QC Solutions, Inc.
    Inventor: Kenneth Steeples
  • Patent number: 7119569
    Abstract: A method and apparatus for measuring damage of an ion implanted semiconductor wafer during semiconductor processing. The method includes the steps of conveying the wafer such that a surface of the wafer is substantially parallel to a surface photovoltage electrode of a head assembly during the semiconductor processing and exposing at least a portion of the wafer to light having a wavelength, and an intensity and modulating the light intensity at a predefined frequency. The method also includes the step of varying the frequency of the light intensity modulation and detecting the surface photovoltage in response to light modulated at the various frequencies using the surface photovoltage electrode. The method then calculates an electrical property of the wafer from the photovoltage induced at the surface of the wafer at each of the light intensity modulation frequencies.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: October 10, 2006
    Assignee: QC Solutions, Inc.
    Inventor: Kenneth Steeples
  • Patent number: 6967490
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 22, 2005
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo
  • Patent number: 6924657
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: August 2, 2005
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo
  • Patent number: 6911350
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: June 28, 2005
    Assignee: QC Solutions, Inc.
    Inventors: Edward Tsidilkovski, Kenneth Steeples
  • Patent number: 6909302
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: June 21, 2005
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo
  • Publication number: 20050074909
    Abstract: The invention relates to a method and apparatus for real-time in-situ implantation and measurement incorporating a feedback loop to adjust the implantation dose of a substrate during the manufacturing and testing of semiconductor wafers. During processing, the substrate, such as a silicon wafer, is transported between a measuring device and an implantation device multiple times to ensure that where the beam from the implantation device hits the substrate, the doping concentration falls within the range of desired parameters.
    Type: Application
    Filed: July 19, 2004
    Publication date: April 7, 2005
    Applicant: QC Solutions, Inc.
    Inventor: Kenneth Steeples
  • Patent number: 6803588
    Abstract: An apparatus for surface treating a semiconductor wafer includes a surface treatment chamber and a source of radiation. The semiconductor wafer disposed inside the chamber is illuminated with radiation sufficient to create a plurality of electron-hole pairs near the surface of the wafer and to desorb ions and molecules adsorbed on the surface of the wafer.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: October 12, 2004
    Assignee: QC Solutions, Inc.
    Inventor: Emil Kamieniecki
  • Publication number: 20040191936
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Applicant: QC Solutions, Inc.
    Inventors: Edward Tsidilkovski, Kenneth Steeples
  • Publication number: 20040046585
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Application
    Filed: March 28, 2003
    Publication date: March 11, 2004
    Applicant: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo
  • Patent number: 6388455
    Abstract: This invention relates to a method and apparatus for simulating a surface photo-voltage, more particularly with a photodiode on a process sized disk for calibrating surface photo-voltage measurement devices. The device for simulating a surface photo-voltage includes the photodiode, the disk, a resistor, and may further include an operational amplifier. The apparatus for simulating a surface photo-voltage of the current invention facilitates calibration of surface photo-voltage measurement devices by using a process sized disk to fit directly on a surface photo-voltage measurement chuck.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: May 14, 2002
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Krzysztof E. Kamieniecki, Jeffrey L. Sauer, Janusz Butkiewicz
  • Patent number: 6325078
    Abstract: An apparatus for surface treating a semiconductor wafer includes a surface treatment chamber and a source of radiation. The semiconductor wafer disposed inside the c amber is illuminated with radiation sufficient to create a plurality of electron-hole pairs near the surface of the wafer and to desorb ions and molecules adsorbed on the surface of the wafer.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: December 4, 2001
    Assignee: QC Solutions, Inc.,
    Inventor: Emil Kamieniecki
  • Patent number: 6315574
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: November 13, 2001
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo
  • Patent number: 6069017
    Abstract: An apparatus and method for the real-time, in-line testing of semiconductor wafers during the manufacturing process. In one embodiment the apparatus includes a probe assembly within a semiconductor wafer processing line. As each wafer passes adjacent the probe assembly, a source of modulated light, within the probe assembly, having a predetermined wavelength and frequency of modulation, impinges upon the wafer. A sensor in the probe assembly measures the surface photovoltage induced by the modulated light. A computer then uses the induced surface photovoltage to determine various electrical characteristics of the wafer.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: May 30, 2000
    Assignee: QC Solutions, Inc.
    Inventors: Emil Kamieniecki, Jerzy Ruzyllo