Abstract: A delta-sigma modulation apparatus and a dynamic element-matching circuit thereof are disclosed. The dynamic element-matching circuit includes a data aligner, a logic operation circuit, and a delayer. The data aligner receives an input matching data and a pointer signal and shifts the input matching data according to the pointer signal to generate an output matching data. The logic operation circuit receives the output matching data and performs a logic operation on the output matching data to generate a preceding pointer signal. The delayer receives the preceding pointer signal and delays the preceding pointer signal according to a sample clock pulse to generate the pointer signal.
Type:
Application
Filed:
March 12, 2013
Publication date:
July 3, 2014
Applicants:
QUADLINK TECHNOLOGY, INC., QUADLINK TECHNOLOGY, INC.