Patents Assigned to Qualcomm Atheros Technology Ltd.
  • Patent number: 8320968
    Abstract: A network, network device and method is disclosed. A network of network nodes is disclosed in which the network nodes securely transmit communication signals using one or more spatial parameters unique to the network nodes. A dad positioning device capable of operating as a node in a network of the present invention is also disclosed.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 27, 2012
    Assignee: QUALCOMM Atheros Technology Ltd.
    Inventors: Daniel Collin Jenkins, Timothy Ronald Jackson, Peter Joseph Maimone
  • Publication number: 20120114018
    Abstract: Clock compensation for GPS receivers. A receiver in accordance with the present invention comprises a Radio Frequency (RF) portion, and a baseband portion, coupled to the RF portion, wherein the baseband portion comprises a crystal, an oscillator, coupled to the crystal, wherein the oscillator generates a clock signal based on a signal received from the crystal, a counter, coupled to the oscillator via the clock signal, a comparator, coupled to the counter, a controller, at least one logic gate, coupled to the comparator and the controller, and a combiner, coupled to the at least one logic gate, the controller, and the counter and producing an accurate clock signal therefrom.
    Type: Application
    Filed: January 17, 2012
    Publication date: May 10, 2012
    Applicant: QUALCOMM ATHEROS TECHNOLOGY LTD.
    Inventor: Richard Obermeyer
  • Patent number: 8107579
    Abstract: Clock compensation for GPS receivers. A receiver in accordance with the present invention comprises a Radio Frequency (RF) portion, and a baseband portion, coupled to the RF portion, wherein the baseband portion comprises a crystal, an oscillator, coupled to the crystal, wherein the oscillator generates a clock signal based on a signal received from the crystal, a counter, coupled to the oscillator via the clock signal, a comparator, coupled to the counter, a controller, at least one logic gate, coupled to the comparator and the controller, and a combiner, coupled to the at least one logic gate, the controller, and the counter and producing an accurate clock signal therefrom.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: January 31, 2012
    Assignee: Qualcomm Atheros Technology Ltd.
    Inventor: Richard Obermeyer