Abstract: An input oscillator for use in a digital time base corrector comprising a triggered oscillator circuit and a variable period delay device having a first input for receiving the synchronizing pulse and for producing an output pulse whose back edge coincides approximately in time with the center of the filtered colour burst. A select burst transition device has an input connected to the delay device and an output for triggering the oscillator circuit. A window circuit has an output connected to a second input of the delay device. A pulse former is provided controlled from the trailing edge of the output of the delay device. The bistable window circuit effects change of the delay period of the delay device when the output of the pulse former coincides in the window circuit with a burst transition whereby the trailing edge of the output of the delay device is made to occur between burst transitions.

Abstract: The memory circuit comprises a semiconductor shift register and means for effecting two phase clocking of the digital information through the shift register. Transformer means are provided for inducing a controlled amount of cross-talk in each of the two phases in the opposite sense to cross-talk generated by capacitive components present in the shift register whereby the induced cross-talk substantially cancels out the capacitive generated cross-talk.

Abstract: The television digital time base corrector comprises an analogue to digital converter for receiving a video analogue signal, a store for receiving the successive line information in digital form from the output of the analogue to digital converter, a digital to analogue converter for receiving the stored signal, a read/write control circuit for writing the digital information into said store, an input oscillator for determining the rate of conversion of the analogue signal and the rate of writing the store, and an output oscillator for controlling the rate of reading out of the digital information from the store and the rate of conversion of the digital information in the store. The input oscillator is in the form of a triggered oscillator which is switched on and off in timed relationship with the video sync pulse and/or sub-carrier color burst. The oscillator thus commences its pulse generation at a time which is directly related to the timing of the sync pulse.

Abstract: A circuit board having a multiway connector disposed along one edge thereof. The multiway connector includes a plurality of contacts. Earth path contacts of the connector are offset in relation to the remaining contacts so as to be the first to make connection with the corresponding connector upon insertion of the board into the connector and conversely the last to break connection upon extraction of the board from the corresponding connector.

Abstract: The television digital time base corrector for television equipment comprises an analogue to digital converter for receiving a video analogue signal, a store for receiving the successive line information in digital form from the output of the analogue to digital converter, a digital to analogue converter for receiving the stored signal, a read/write control circuit for writing the digital information into the store, an input oscillator for determining the rate of conversion of the analogue signal and the rate of writing into the store and output oscillator for controlling the rate of reading out of the digital information from the store and the rate of conversion of the digital information in the store. The input oscillator is in the form of a triggered oscillator which is switched on and off in time relationship with the video sync pulse and/or sub-carrier color burst, the period of switching on and off and the frequency of the oscillator being dependent upon the duration of the lines.

Abstract: The apparatus for comparing clock phase identification signals in a time base corrector so as to control the Writing and Reading of information into and out of storage means therein, the storage means including a plurality of stores for storing sequential line information. The apparatus includes means for deriving in-phase and anti-phase "Write" clock phase identification signals from line frequency sync signals. Selector means select one of the in-phase or anti-phase signals and first latch means receive the selected one of the signals. Means are provided for simultaneously deriving a "Read" clock phase identification signal at a frequency which is half the line frequency from a sub-carrier reference signal.

Abstract: The drop out compensation system comprising input means for accepting a colour or monochrome picture information signal, output means, a drop out compensating signal generator, switch means for effecting connection of said input means to said compensating signal generator and for effecting connection between said compensating signal generator and said output means, and a drop out detector for effecting switching of said switch means, said compensating signal generator including delay means for providing a delayed output signal of the information signal entering the delay means, adder means for summing the information arriving simultaneously at the delay means and said delayed output, means for reducing the level of the signal from the compensating signal generator so that the low frequency luminance level of said resulting compensating signal at said output means has a value the same as that in the colour picture information signal at the input means, and storage means for effecting a delay within the compens