Patents Assigned to Quantum Logic Devices, Inc.
  • Patent number: 7338711
    Abstract: Nanoparticles having designed or engineered coatings that provide enhanced or improved characteristics to the coated nanoparticles and methods for forming the improved nanoparticles from oxide or ceramic coated nanoparticles.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: March 4, 2008
    Assignee: Quantum Logic Devices, Inc.
    Inventor: Louis Brousseau, III
  • Patent number: 7208784
    Abstract: A single-electron transistor includes a projecting feature, such as a pyramid, that projects from a face of a substrate. A first electrode is provided on the substrate face that extends onto the projecting feature. A second electrode is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes. At least one nanoparticle is provided on the projecting feature between the first and second electrodes.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: April 24, 2007
    Assignee: Quantum Logic Devices, Inc.
    Inventor: Louis C. Brousseau, III
  • Publication number: 20050230713
    Abstract: A single-electron transistor includes a projecting feature, such as a pyramid, that projects from a face of a substrate. A first electrode is provided on the substrate face that extends onto the projecting feature. A second electrode is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes. At least one nanoparticle is provided on the projecting feature between the first and second electrodes.
    Type: Application
    Filed: December 17, 2004
    Publication date: October 20, 2005
    Applicant: Quantum Logic Devices, Inc.
    Inventor: Louis Brousseau
  • Patent number: 6673717
    Abstract: Nanopores for single-electron devices may be used as templates for placing of a desired number of nanoparticles at a desired location in the devices. Nanopores may be fabricated by providing on a substrate spaced apart electrode regions, a spacer region therebetween, and a cover layer on the spaced apart electrode regions and on the spacer region. A wet etching solution is contacted to the cover-layer. At least one of the spaced apart electrode regions is energized, to selectively wet etch the cover layer adjacent the spacer region and define a nanopore in the cover layer adjacent the spacer region. At least one nanoparticle is placed in the nanopore. Accordingly, nanopores can be aligned to a buried spacer region.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: January 6, 2004
    Assignee: Quantum Logic Devices, Inc.
    Inventor: Louis C. Brousseau, III
  • Patent number: 6653653
    Abstract: A single-electron transistor includes a projecting feature, such as a pyramid, that projects from a face of a substrate. A first electrode is provided on the substrate face that extends onto the projecting feature. A second electrode is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. At least one nanoparticle is provided on the projecting feature between the first and second electrodes. Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: November 25, 2003
    Assignee: Quantum Logic Devices, Inc.
    Inventor: Louis C. Brousseau, III