Patents Assigned to QULSAR, INC.
  • Patent number: 10187861
    Abstract: Implementing a distributed boundary clock in situations where book-end devices such as microwave TX/RX pairs must collaborate in achieving PTP on-path support is described. A dedicated channel, generally low-speed compared to the main channel is used to transfer timing from the master side to the slave side using framing and super-framing applied to the digital channel. Time-stamps of events such as super-frame boundaries are communicated between the two sides to enable timing transfer.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: January 22, 2019
    Assignee: Qulsar, Inc.
    Inventor: Kishan Shenoi
  • Patent number: 10142044
    Abstract: A Managed Timing Engine (MTE) provides a primary timing output synchronized to a selected input reference from a multiplicity of input references. Additional timing outputs can be generated such that there is a programmable frequency offset (in ppb) between them and the main output. The rate (in Hz) of the outputs can be programmable. The MTE can introduce a programmable delay for periodic phase references.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: November 27, 2018
    Assignee: QULSAR, INC.
    Inventors: Kishan Shenoi, Shashi Kumar, Ben Entezam
  • Publication number: 20180139709
    Abstract: Implementing a distributed boundary clock in situations where book-end devices such as microwave TX/RX pairs must collaborate in achieving PTP on-path support is described. A dedicated channel, generally low-speed compared to the main channel is used to transfer timing from the master side to the slave side using framing and super-framing applied to the digital channel. Time-stamps of events such as super-frame boundaries are communicated between the two sides to enable timing transfer.
    Type: Application
    Filed: December 26, 2017
    Publication date: May 17, 2018
    Applicant: QULSAR, INC.
    Inventor: Kishan Shenoi
  • Patent number: 9860003
    Abstract: A packet network that includes the distribution of timing information (time and frequency) between server and client devices can continue to operate in a holdover mode even when the server loses its primary timing reference based on GNSS. This is achieved by populating the packet network with some client devices that also have access to the same timing reference. These devices are used in a reverse timing transfer mode to provide a hack-up reference to the server and thereby provide a graceful solution to the problem of loss of reference.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: January 2, 2018
    Assignee: Qulsar, Inc.
    Inventors: Kishan Shenoi, Rajendra Nath Datta
  • Patent number: 9854548
    Abstract: A method for implementing a distributed boundary clock in situations where book-end devices such as microwave TX/RX pairs must collaborate in achieving PTP on-path support is described. A dedicated channel, generally low-speed compared to the main channel is used to transfer timing from the master side to the slave side using framing and super-framing applied to the digital channel. Time-stamps of events such as super-frame boundaries are communicated between the two sides to enable timing transfer.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: December 26, 2017
    Assignee: Qulsar, Inc.
    Inventor: Kishan Shenoi
  • Publication number: 20170135053
    Abstract: A master and slave module are described that facilitate the distribution of timing, both frequency and phase over a radio link The signal transmitted from the master to the slave is suitable for delivering a frequency reference and an approximate phase/time. The precise phase at the slave is obtained by using a reverse communication between the slave and the master over the same radio channel in a time-division-duplex mode. Additional slaves can be accommodated by using a multiple time-slot arrangement.
    Type: Application
    Filed: August 29, 2016
    Publication date: May 11, 2017
    Applicant: QULSAR, INC.
    Inventors: Kishan Shenoi, Lincolm Worsham, Nishanth Satyanarayana
  • Patent number: 9529748
    Abstract: A master and slave module are described that facilitate the distribution of timing, both frequency and phase over a backplane. The method is applicable over any pair of shared transmission medium. The signal transmitted from the master to the slave is suitable for delivering a frequency reference and an approximate phase. The precise phase at the slave is obtained by delaying the 1PPS by a programmable amount estimated by measuring the round-trip delay between the master and slave.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: December 27, 2016
    Assignee: Qulsar, Inc.
    Inventors: Kishan Shenoi, Shashi Kumar
  • Publication number: 20160112974
    Abstract: A method for implementing a distributed boundary clock in situations where book-end devices such as microwave TX/RX pairs must collaborate in achieving PTP on-path support is described. A dedicated channel, generally low-speed compared to the main channel is used to transfer timing from the master side to the slave side using framing and super-framing applied to the digital channel. Time-stamps of events such as super-frame boundaries are communicated between the two sides to enable timing transfer.
    Type: Application
    Filed: October 16, 2015
    Publication date: April 21, 2016
    Applicant: QULSAR, INC.
    Inventor: Kishan Shenoi
  • Publication number: 20150003479
    Abstract: A packet network that includes the distribution of timing information (time and frequency) between server and client devices can continue to operate in a holdover mode even when the server loses its primary timing reference based on GNSS. This is achieved by populating the packet network with some client devices that also have access to the same timing reference. These devices are used in a reverse timing transfer mode to provide a hack-up reference to the server and thereby provide a graceful solution to the problem of loss of reference.
    Type: Application
    Filed: June 30, 2014
    Publication date: January 1, 2015
    Applicant: QULSAR, INC.
    Inventors: Kishan Shenoi, Rajendra Nath Datta
  • Publication number: 20140351468
    Abstract: A master and slave module are described that facilitate the distribution of timing, both frequency and phase over a backplane. The method is applicable over any pair of shared transmission medium. The signal transmitted from the master to the slave is suitable for delivering a frequency reference and an approximate phase. The precise phase at the slave is obtained by delaying the 1PPS by a programmable amount estimated by measuring the round-trip delay between the master and slave.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: QULSAR, INC.
    Inventors: Kishan Shenoi, Shashi Kumar
  • Publication number: 20140286357
    Abstract: A Managed Timing Engine (MTE) provides a primary timing output synchronized to a selected input reference from a multiplicity of input references. Additional timing outputs can be generated such that there is a programmable frequency offset (in ppb) between them and the main output. The rate (in Hz) of the outputs can be programmable. The MTE can introduce a programmable delay for periodic phase references.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 25, 2014
    Applicant: QULSAR, INC.
    Inventors: Kishan Shenoi, Shashi Kumar, Ben Entezam