Abstract: The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side.

Abstract: The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side.

Abstract: Due to size and cost, it becomes advantageous for integrated circuit (IC) manufacturers to use “single-ended” (one signal path per unique information path) high speed signals electrical contact pins (pins transmitting digital information that connect the integrated circuit to a printed circuit board) with a minimum number of surrounding powers and grounds. This lower cost method, however, creates electrical interference and coupling issues known as crosstalk between two adjacent signal paths in the via structure required to electrically connect the integrated circuit to the signal paths in the printed circuit board. Such crosstalk, in turn, increases jitter, degrades timing, and ultimately reduces the maximum operating speed of the circuit (performance). This disclosure presents a structure using micro-plating, micro-drilling and micro-machining methods that isolates adjacent signals by placing a metal barrier that shunts coupling currents to ground.

Abstract: A shuttle board relay is provided that is scalable to a specific pitch or routing density. The shuttle board relay provides a path with different sets of electrical components that allows this via by allowing the integration of components and other types of customization. The shuttle board relay provides a minimally disruptive path to the signal. This minimizes loss and signal distortion, isolation and crosstalk are a function of pitch. Since pitch can be set, grounds included, etc., a design may be fully optimized for low cross talk.

Abstract: A shuttle board relay is provided that is scalable to a specific pitch or routing density. The shuttle board relay provides a path with different sets of electrical components that allows this via by allowing the integration of components and other types of customization. The shuttle board relay provides a minimally disruptive path to the signal. This minimizes loss and signal distortion, isolation and crosstalk are a function of pitch. Since pitch can be set, grounds included, etc., a design may be fully optimized for low cross talk.

Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.

Abstract: A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface.

Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.

Abstract: The present disclosure relates to reducing unwanted RF noise in a printed circuit board (PCB) containing an RF device. An isolation filter is embedded in a PCB containing an RDF device. By placing the isolation filter as close as possible to the RF device in order to dramatically reduce unwanted RF noise due to unavoidable coupling between Vias and planes in the PCB structure.

Abstract: A looped conductive wire or alternatively a conductive material such as a conductive foil is electrically connected with elastomeric material to provide electrical connections with one or more electronic devices.