Abstract: A large flat panel display having a plurality of tile display modules with capability in the range of 12 or more lines per inch, being precisely manufactured and aligned such that the interpixel spacing between two adjacent tiles maintains the uniformly periodic spacing of the interpixel spacing within tiles. The display is addressed as a single monolithic display, without reference to the plurality of individual tiles making up the display. All of the interconnections between tiles are located between tiles in the “shadow area”, unless all tiles can have an edge around the periphery of the display. Also disclosed are methods of making and assembling the tiles and the displays.

Abstract: The present invention features flat-panel displays having a mosaic of tiles, and methods of constructing and sealing them. Sealing designs are described to maintain appropriate vacuum levels for FEDs, PFPDs and LCDs. The mosaic of tiles forming a flat-panel display may include subassembly tiles, with each consisting of two, unsealed, substantially parallel plates having a structure positioned between them; these are known as s-tiles. The tiles may be enclosed by a cover plate and backplate. Non-permeable material may be deposited on the cover plate and the backplate, with solderable metal overlaid on the non-permeable material. A metallized, non-permeable spacer/connector is also located between the cover plate and backplate for hermetically sealing the perimeter of the display. A set of electrical-interconnection, metal feed-throughs can also be positioned in the non-permeable spacer/connector.

Abstract: The present invention features methods and apparatus for the correction of spatial non-uniformities in color only, and color and brightness combined, that arise from materials, manufacturing, and operational variations in tiled, color flat-panel displays. Such uniformities can introduce gradual or abrupt color and brightness variations in monolithic and tiled displays. Correction methods are based on control of the manufacturing and assembly process, and/or remapping of the colors of the display to match uniformity requirements of the average human observer. Correction methods can be implemented using serial and parallel versions using electronic circuits commonly used in video signal processing. Apparatus for a self-calibration method are also described.

Abstract: The present invention features procedures for correcting discoloration and brightness variations due to liquid crystal cell gap variations or other optical, electro-optical, ambient light, electronic, mechanical, and materials anomalies arising in tiled, flat-panel displays. The purpose of these corrections is to achieve a visually seamless appearance. Absolute, relative and/or smoothing corrections are implemented by performing pixel data video processing with correction data acquired from memory. Techniques for determining and applying these corrections are described.

Abstract: The present invention features procedures for correcting discoloration and brightness variations due to liquid crystal cell gap variations or other optical, electro-optical, ambient light, electronic, mechanical, and materials anomalies arising in tiled, flat-panel displays. The purpose of these corrections is to achieve a visually seamless appearance. Absolute, relative and/or smoothing corrections are implemented by performing pixel data video processing with correction data acquired from memory. Techniques for determining and applying these corrections are described.

Abstract: The present invention features procedures for correcting discoloration and brightness variations due to liquid crystal cell gap variations or other optical, electro-optical, ambient light, electronic, mechanical, and materials anomalies arising in tiled, flat-panel displays. The purpose of these corrections is to achieve a visually seamless appearance. Absolute, relative and/or smoothing corrections are implemented by performing pixel data video processing with correction data acquired from memory. Techniques for determining and applying these corrections are described.

Abstract: The present invention features procedures for correcting discoloration and brightness variations due to liquid crystal cell gap variations or other optical, electro-optical, ambient light, electronic, mechanical, and materials anomalies arising in tiled, flat-panel displays. The purpose of these corrections is to achieve a visually seamless appearance. Absolute, relative and/or smoothing corrections are implemented by performing pixel data video processing with correction data acquired from memory. Techniques for determining and applying these corrections are described.

Abstract: The present invention features an apparatus and method for collimating light for use with a tiled, flat-panel display having a seamless appearance (i.e., having visually imperceptible seams). A novel, multi-cell, collimation lattice is placed behind the bottom mask of the tiled, flat-panel display assembly, but in front of an illumination source. The lattice is formed from a thin, non-reflective material, so that the acceptable light passing through the lattice is not "blocked", but the unwanted (off-axis) light impinges upon the lattice cell walls and is absorbed.

Abstract: The present invention features methods for assembling arrays of AMLCD tiles into tiled, flat-panel displays having visually imperceptible seams between the tiles. Flowable, polymeric adhesive layers are used between a back substrate, various optical components such as masks and polarizers, the tiles, and a front cover plate. Several unique techniques for establishing and maintaining tile-to-tile registration during assembly of the tiled, flat-panel display are presented.

Abstract: The present invention features procedures for correcting discoloration and brightness variations due to liquid crystal cell gap variations or other optical, electro-optical, ambient light, electronic, mechanical, and materials anomalies arising in tiled, flat-panel displays. The purpose of these corrections is to achieve a visually seamless appearance. Absolute, relative and/or smoothing corrections are implemented by performing pixel data video processing with correction data acquired from memory. Techniques for determining and applying these corrections are described.

Abstract: Pixel layout and placement designs provide improved color gamut in a tiled flat-panel display. The subpixels of the pixel designs are sized, placed and geometrically shaped so that the color purity, or equal amounts of RGB, are emitted from the display. The pixel designs match the subpixel size with the color filter and spectral content of the illumination source. The layout and placement design of the color pixel elements does not significantly shift the color purity of each pixel of the tile that may be in plane misalignment with respect to aperture masks above and below the tiles in the display configurations.

Abstract: The present invention features methods for assembling arrays of AMLCD tiles into tiled, flat-panel displays having visually imperceptible seams between the tiles. Flowable, polymeric adhesive layers are used between a back substrate, various optical components such as masks and polarizers, the tiles, and a front cover plate. Several unique techniques for establishing and maintaining tile-to-tile registration during assembly of the tiled, flat-panel display are presented.

Abstract: The present invention features a tiled, flat-panel display (FPD) that has color-matching between the tiles, which is accomplished by a direct transformation of video data through values stored in tables, and addressed by the spatial position in both the display and the input data value. One or more transformation tables are disposed proximate a graphics controller, which synchronizes, routes and controls the timing of data to data (column) drivers of the FPD. The transformation tables may be read-only or read-write memory devices. They are used to provide data representative of corrections or adjustments of color luminance on a pixel-by-pixel, or sub-pixel-by-sub-pixel basis, thus matching color of all portions of a display tile and all tiles in the FPD. This invention also describes a method of determining the values for the tables by measuring the common luminance response of the regions of the display.

Abstract: This invention describes tiling structures, methods, and circuits for making large flat-panel displays from an array of microdisplays. The inventive displays overcome the intrinsic size limits of monolithic microdisplays and allow the construction of large area, low cost, high brightness, high contrast magnified view or rear projection flat panel displays having visually imperceptible seams and are optically uniform. A structure wherein multiple microdisplay tiles are mounted on a thermally matched common substrate having inherent temperature control features is described. Additional integrated circuits such as CMOS circuits may be embedded either in the back plane of the microdisplay tiles themselves and/or in the common substrate if the common substrate is made from a suitable semiconductor material. These circuits can provide functions such pixel addressing, image control, or even complete microprocessor functions within the flat-panel display assembly itself.

Abstract: Methods of fabricating AMLCD tiled displays are disclosed, in which variations in the width and the SIP location of seals are controlled. The seals can be controlled by using either a trench or a dam that guides the flow and/or the position of the sealing epoxy between the upper and lower glass plates. The purpose of the dam or trench is to prevent the flow of epoxy towards the pixels of the display. The article made by the above method is a substantially flat-panel display (FPD) having a mosaic of individual, hermetically-sealed tiles disposed adjacent one another upon the lower plate or substrate. The tiles have visually imperceptible seams between them. The individual tiles have pixels and edges that are sealed in position, relative to the substrate, by means of a sealing material, such as an epoxy. The dams or trenches are disposed along the individual tiles, adjacent the pixels.

Abstract: The present invention is a tiled, seamless-type, flat-panel display with improved light efficiency. The display consists of tiles that are bonded together during assembly with an index-matching adhesive, as is commonly known in the art. Prior to bonding the tiles, however, their adjoining edges are cut at an angle. The pixel pitch or aperture spacing of the display is maintained in the horizontal direction, while the tiles are vertically shifted. The distance from the center of the pixel nearest the edge to the cut in the aperture mask is made greater than one-half of a pixel. When viewed from above, the aperture mask is continuous. The overlapping edges of the tile cuts are positioned between the apertures, so as to better conceal the edges.

Abstract: A large flat panel display having a plurality of tile display modules with capability in the range of 12 or more lines per inch, being precisely manufactured and aligned such that the interpixel spacing between two adjacent tiles maintains the uniformly periodic spacing of the interpixel spacing within tiles. The display is addressed as a single monolithic display, without reference to the plurality of individual tiles making up the display. All of the interconnections between tiles are located between tiles in the "shadow area", unless all tiles can have an edge around the periphery of the display. Also disclosed are methods of making and assembling the tiles and the displays.

Abstract: The present invention features methods and apparatuses for sealing tiled, flat-panel displays (FPDs). Tile edges corresponding with the display's perimeter edges are designed with a wide seal. Interior edges, however, have narrow seals in order to maintain the desired, constant, pixel pitch across tile boundaries. In some cases, this invention applies specifically to arrays of tiles 2.times.2 or less, and, in other cases, to N.times.M arrays, where N and M are any integer numbers. The tiles are enclosed with top and bottom glass plates, which are sealed with an adhesive bond to the tiles on the outside perimeter of the tiled display. Vertical seams (where tiles meet at the perimeter of the FPD) are sealed with a small amount of polymer. The seal may be constructed between a cover plate and a back plate, sandwiching the tiles. The AMLCD edges may be coated with either a non-permeable material or a polymer having an extremely low permeability (for example, Parylene.TM.).

Abstract: The present invention features flat-panel displays having a mosaic of tiles, and methods of constructing and sealing them. Sealing designs are described to maintain appropriate vacuum levels for FEDs, PFPDs and LCDs. The mosaic of tiles forming a flat-panel display may include subassembly tiles, with each consisting of two, unsealed, substantially parallel plates having a structure positioned between them; these are known as s-tiles. The tiles may be enclosed by a cover plate and backplate. Non-permeable material may be deposited on the cover plate and the backplate, with solderable metal overlaid on the non-permeable material. A metallized, non-permeable spacer/connector is also located between the cover plate and backplate for hermetically sealing the perimeter of the display. A set of electrical-interconnection, metal feed-throughs can also be positioned in the non-permeable spacer/connector.

Abstract: The present invention features a tiled, flat-panel, mosaic display with a luminance-correcting capability and having a seamlessness characteristic. Column and row inputs that are typically provided for a single flat panel are distributed over a number of tiles. The display is fabricated by sorting the tiles into groups, and matching their color coordinates prior to assembly. After assembly, measurements of the luminance of the display are processed to generate correction data, which is compressed into a reduced set of coefficients. A processor, located between a video controller and the display drivers for each of the tiles, has a memory containing these interpolation coefficients for correcting luminance in the tiles. A multiplicity of processing units is connected to the video controller and the processor for performing video correction in real time.