Abstract: A method of emulation or functional testing of a first microprocessor in its functional environment including one or several peripherals and at least one internal bus of communication between this first microprocessor and its peripherals, from a second microprocessor, consisting of deactivating the first microprocessor, using the communication bus(es) to communicate between the two microprocessors and the peripheral(s), and activating the second microprocessor, wherein the first microprocessor communicates with the second microprocessor over a series link and wherein the second microprocessor is realized by a simulation model.