Abstract: An interactive 3-dimensional computer graphics display system has an arbitrary number of parallel connected graphic arithmetic processors (GAPS) coupled to an applications processor through a display list management module and coupled to an image memory unit that generates video output. High level commands from the applications processor are distributed for substantially equal temporal processing among the GAPS by delivering the commands to that GAP which is most ready to receive the next command. Each GAP has a FIFO input memory. A plurality of priority levels are established related to GAP FIFO input emptiness. An additional priority scheme is established within each FIFO emptiness level using a daisy-chained grant signal. A command bus includes dedicated lines for control signals between the GAPs to signal the priority and to pass along the grant signal.

Abstract: Disclosed is a three-dimensional display system that utilizes a host processor for performing geometric transformations and a local display processor for processing the user-supplied information which defines the object to be displayed. The display processor creates image data defining the location, color and intensity of each point of the overall image. This display processor processes and stores depth data which defines the corresponding depth relationships of the image points at each location of the overall image with the depth data being stored in a depth buffer, which is part of the display processor. The depth buffer is a two port memory device with one port being a random access port and the other being a serial access port. The display processor pieplines depth buffering operations by loading a row of data from the depth buffer into a shift register and then reading (a Read operation) the relevant pixel data through the serial access port which is connected to the shift register.