Patents Assigned to Realtek Semiconducutor Corp.
  • Patent number: 7911287
    Abstract: The present invention provides a multi-phase layout structure and method. The layout structure comprises: a first layout layer; a second layout layer substantially parallel to the first layout layer; a plurality of traces, each transmitting a signal, and the plurality of signals having a phase difference between each other; wherein a horizontal coupling capacitance is provided between two neighboring traces configured on the same layer of the first layout layer and the second layout layer, a vertical coupling capacitance is provided between two neighboring traces configured on different layers of the first layout layer and the second layout layer, and the plurality of traces have substantially the same total coupling capacitance wherein the total coupling capacitance is defined by the horizontal coupling capacitance and the vertical coupling capacitance.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: March 22, 2011
    Assignee: Realtek Semiconducutor Corp.
    Inventor: Chao-Cheng Lee