Abstract: An inherent-security signal comparator (COMP) is driven by two or more input signals (V1, *V2) coming from a control system (.mu.P1, .mu.P2) and generates an alternate output signal (C) of a predetermined frequency whenever both its input signals are identical and terminates its output signal when its input signals wander off from identity, or any of the circuit components of the comparator break down, or its d.c. supply is interrupted. An amplifier (AMP) driven by the comparator drives an isolating transformer (TR) coupled to a voltage rectifier/regulator device (REG) for the supply to the control system. Preferably an oscillator (OSC), whose output is connected to the input of the amplifier (AMP) in common with the output of the comparator, is supplied by a voltage pulse generated by a monostable circuit (T3-R7-R8-R9-C5-C6-D1-D2) which is momentarily enabled at the start-up of the supply circuit.

Abstract: Pulse formers (14) driving respective LEDs (12) are energized by the cells of a shift register (16) which is docked by a clock line (CK), and to whose first cell an initial pulse is applied by a first signal generator (GR). A barrier-end Line (FB) is connected to the output of the shift register and to the input of the first signal generator. The latter resets the shift register cells through a reset line (RS). A plurality of photodiodes (42) facing the LEDs are connected in common to a bus line (BUS) through resistors (47) and electronic switches (44) which are dosed in turn by the cells of a shift register (46) similarly controlled by a second signal generator (GE) in synchronism with the first. The bus line is connected across a voltage supply through resistors (61, 63) and provides a multi-level signal to an evaluator circuit (VAL). The two shift registers, including the associated LEDs or photodiodes, may form blocks connected in cascade.