Abstract: A method according to the invention has a bonding process of mounting a semiconductor chip on an upper surface of a die pad that has the upper surface whose area is larger than a reverse side of the semiconductor chip. It also has a sealed body formation process of sealing the semiconductor chip so that an undersurface opposite to the upper surface of the die pad may be exposed after the bonding process. Here, the upper surface of the die pad is arranged around an area over which the semiconductor chip is mounted, and has a hollow part arrangement area in which a groove or multiple holes are formed. Moreover, surface roughness of the upper surface is made coarser than surface roughness of the undersurface.

Abstract: Normal memory cells are arranged in rows and columns, and dummy memory cells are arranged to form dummy memory cell rows by sharing memory cell columns with the normal memory cells. When there is at least one defect in the normal memory cells and/or the dummy memory cells, replacement/repair is carried out using a redundant column in a unit of memory cell column. The redundant column includes not only spare memory cells for repair of the normal memory cells but also spare dummy memory cells for repair of the dummy memory cells.