Patents Assigned to Renesas Device Design Corporation
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Publication number: 20060237087Abstract: In lead forming of a packaged semiconductor device having sides and leads extending outwardly from the sides of a package, separation between first and second bottom dies is adjusted to receive the package. The first and second bottom dies have top surfaces that include oblique portions. The package is placed between the first and second bottom dies with the leads proximate the top surfaces of the first and second bottom dies. At least one of (i) the first and second bottom dies and (ii) first and second top dies having respective bottom surfaces with oblique portions complementary to the top surfaces of the first and second bottom dies are moved toward each other. The leads are clamped between the top and bottom dies and are formed. Simultaneously, lateral forces, produced through contact of the complementary top and bottom surfaces and the leads, move the first and second top dies laterally, changing separation between the first and second top dies.Type: ApplicationFiled: June 2, 2006Publication date: October 26, 2006Applicants: Renesas Technology Corp., Renesas Device Design CorporationInventors: Hidetaka Yamasaki, Itaru Matsuo, Hidekazu Manabe, Kenji Imamura, Kenichirou Katou, Mitsutaka Matsuo
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Patent number: 7077170Abstract: In a lead forming apparatus for a semiconductor device, a holder holds a semiconductor device with leads to be formed, the semiconductor device having leads extending from a package. Two die assemblies (for bending, for cutting, or the like) are set in parallel, each including top and bottom dies matched with each other. A mover changes relative distance between the two die assemblies. The top and bottom dies in the two die assemblies are positioned so the leads of the semiconductor device held on the holder are between the dies.Type: GrantFiled: July 8, 2003Date of Patent: July 18, 2006Assignees: Renesas Technology Corp., Renesas Device Design CorporationInventors: Hidetaka Yamasaki, Itaru Matsuo, Hidekazu Manabe, Kenji Imamura, Kenichirou Katou, Mitsutaka Matsuo
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Publication number: 20050076967Abstract: In a lead forming apparatus for a semiconductor device, a holder holds a semiconductor device with leads to be formed, the semiconductor device having leads extending from a package. Two die assemblies (for bending, for cutting, or the like) are set in parallel, each including top and bottom dies matched with each other. A mover changes relative distance between the two die assemblies. The top and bottom dies in the two die assemblies are positioned so the leads of the semiconductor device held on the holder are between the dies.Type: ApplicationFiled: July 8, 2003Publication date: April 14, 2005Applicants: Renesas Technology Corp., Renesas Device Design CorporationInventors: Hidetaka Yamasaki, Itaru Matsuo, Hidekazu Manabe, Kenji Imamura, Kenichirou Katou, Mitsutaka Matsuo
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Patent number: 6870253Abstract: Emitter electrodes (Es) and collector electrodes (Cs) of elements (101 to 104) are connected to bus electrodes (361 to 364) of a bus bar (351), respectively. The bus bar (351) contains seven layers including four insulating layers (not shown) and three conductive layers (shown) interposed between the insulating layers. Namely, each of the bus electrodes (361 to 364) is connected to one of the conductive layers corresponding to one of a positive electrode (P), a negative electrode (N) and an intermediate electrode (L). The collector electrodes (Cs) of the elements (103 and 104) are connected one over the other to the bus electrode (361). The emitter electrodes (Es) of the elements (103 and 104) are connected one over the other to the bus electrode (362). The collector electrodes (Cs) of the elements (101 and 102) are connected one over the other to the bus electrode (363). The emitter electrodes (Es) of the elements (101 and 102) are connected one over the other to the bus electrode (364).Type: GrantFiled: March 3, 2004Date of Patent: March 22, 2005Assignees: Mitsubishi Denki Kabushiki Kaisha, Renesas Device Design CorporationInventor: Koichi Ushijima
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Publication number: 20050051874Abstract: Emitter electrodes (Es) and collector electrodes (Cs) of elements (101 to 104) are connected to bus electrodes (361 to 364) of a bus bar (351), respectively. The bus bar (351) contains seven layers including four insulating layers (not shown) and three conductive layers (shown) interposed between the insulating layers. Namely, each of the bus electrodes (361 to 364) is connected to one of the conductive layers corresponding to one of a positive electrode (P), a negative electrode (N) and an intermediate electrode (L). The collector electrodes (Cs) of the elements (103 and 104) are connected one over the other to the bus electrode (361). The emitter electrodes (Es) of the elements (103 and 104) are connected one over the other to the bus electrode (362). The collector electrodes (Cs) of the elements (101 and 102) are connected one over the other to the bus electrode (363). The emitter electrodes (Es) of the elements (101 and 102) are connected one over the other to the bus electrode (364).Type: ApplicationFiled: March 3, 2004Publication date: March 10, 2005Applicants: MITSUBISHI DENKI KABUSHIKI KAISHA, RENESAS DEVICE DESIGN CORPORATIONInventor: Koichi Ushijima