Patents Assigned to RENESAS ELECTRIC CORPORATION
  • Patent number: 9887301
    Abstract: Performances of a semiconductor device are improved. The semiconductor device has: a gate electrode formed on an SOI layer of an SOI substrate via a gate insulating film having a charge storage film therein; an n-type semiconductor region and a p-type semiconductor region respectively formed on SOI layers on both sides of the gate electrode. A memory cell MC serving as a non-volatile memory cell is formed of the gate insulating film, the gate electrode, the n-type semiconductor region and the p-type semiconductor region.
    Type: Grant
    Filed: July 3, 2016
    Date of Patent: February 6, 2018
    Assignee: Renesas Electric Corporation
    Inventor: Hideki Makiyama
  • Patent number: 9837395
    Abstract: A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: December 5, 2017
    Assignee: Renesas Electrics Corporation
    Inventors: Hisashi Toyoda, Koichi Yamazaki, Koichi Arai, Tatsuhiro Seki
  • Patent number: 8860593
    Abstract: The present invention provides a data processing system which can increase resolution and which has excellent tracking with respect to the switching of a conversion range and is small in conversion error.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: October 14, 2014
    Assignee: Renesas Electric Corporation
    Inventors: Kakeru Kimura, Yoshimi Iso, Masakazu Okamura, Masashi Nishimoto
  • Publication number: 20140082427
    Abstract: To have a problem of occurrence of the same failure in failure detection of a microcontroller. A microcontroller has a CPU and a data access control circuit. The data access control circuit performs two types of accesses: an individual access in which a data access of the CPU is performed for each thread, and a shared access in which a data access of the CPU is performed by executing two threads. The data access control circuit detects a failure of the CPU by making a comparison between the command and the address, respectively, in the shared access generated by executing the two threads.
    Type: Application
    Filed: September 20, 2013
    Publication date: March 20, 2014
    Applicant: Renesas Electrics Corporation
    Inventors: Hiromichi Yamada, Tsutomu Yamada, Nobuyasu Kanekawa, Kesami Hagiwara, Yuichi Ishiguro, Takashi Yasumasu, Kazuyoshi Fukuda, Yoshiyuki Nakada
  • Publication number: 20130065364
    Abstract: To provide a technology capable of preventing the deterioration of the reliability of semiconductor devices caused by the gasification of a part of components of the material constituting a wiring substrate. A wiring layer constituting a circuit pattern is formed over each of the front and rear surfaces of a glass epoxy substrate, and after the formation of a solder resist covering the wiring layer while exposing a part of the wiring layer and prior to a heat treatment (first heat treatment) at 100° C. to 150° C. for dehumidification, a heat treatment (second heat treatment) at 160° C. to 230° C. for gasifying and discharging an organic solvent contained in the material constituting a wiring substrate is performed for the wiring substrate.
    Type: Application
    Filed: October 26, 2012
    Publication date: March 14, 2013
    Applicant: RENESAS ELECTRIC CORPORATION
    Inventor: RENESAS ELECTRIC CORPORATION