Patents Assigned to Renesas LSI Design Corporation
  • Patent number: 8260835
    Abstract: A random number generator includes a ring oscillator having an EX-OR gate and four inverters together forming a loop. This loop enters stable state for a start signal having the low level and oscillates for the start signal having the high level. When the start signal has a pulse of a width shorter than the loop's delay time, output nodes responsively, sequentially enter metastable state hovering between the high and low levels. The metastable waveform becomes smaller with time and finally disappears. As metastable state cannot be controlled in longevity, it disappears at any random number node. A counter thus outputs a signal serving as true random number data depending on the longevity of the metastable state. A random number generator miniaturized and having reduced power consumption, and of high performance can thus be implemented.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: September 4, 2012
    Assignees: Renesas Electronics Corporation, Renesas LSI Design Corporation
    Inventors: Kazuhiko Fukushima, Atsuo Yamaguchi
  • Patent number: 7424500
    Abstract: A random number generator includes a ring oscillator having an EX-OR gate and four inverters together forming a loop. This loop enters stable state for a start signal having the low level and oscillates for the start signal having the high level. When the start signal has a pulse of a width shorter than the loop's delay time, output nodes responsively, sequentially enter metastable state hovering between the high and low levels. The metastable waveform becomes smaller with time and finally disappears. As metastable state cannot be controlled in longevity, it disappears at any random number node. A counter thus outputs a signal serving as true random number data depending on the longevity of the metastable state. A random number generator miniaturized and having reduced power consumption, and of high performance can thus be implemented.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: September 9, 2008
    Assignees: Renesas Technology Corp., Renesas LSI Design Corporation
    Inventors: Kazuhiko Fukushima, Atsuo Yamaguchi
  • Patent number: 7200828
    Abstract: A replacement cell determining part is configured so as not to handle, as a cell that should be replaced, the case where the sole difference is the cell identification name and other data are matched, in addition to the case where all of the cell identification name, the cell type name, the pin name of the cell, and the signal name assigned to the pin are matched. A rerouting signal determining part is configured so as not to handle, as a signal that should be rerouted, the case where the sole difference is the signal name and other data are matched, in addition to the case where all of the signal name, the pin name to which the signal is applied, the cell identification name of a cell possessed by the pin, and the cell type name of the cell are matched.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: April 3, 2007
    Assignees: Renesas Technology Corp., Renesas LSI Design Corporation
    Inventors: Norimichi Hasegawa, Nobuhide Naritomi, Yutaka Kamakura
  • Publication number: 20050055531
    Abstract: A free page extracting unit extracts a free page of a non-volatile memory. A directory page writing unit writes, to the free page extracted by the free page extracting unit, a directory that includes a logical page/physical page translation table of a page to which updated data are to be written. Further, a data page writing unit writes updated data to the free page extracted by the free page extracting unit. Therefore, even when data updating operation is interrupted, loss of the original data can be prevented, and the data before updating can be recovered.
    Type: Application
    Filed: February 25, 2004
    Publication date: March 10, 2005
    Applicants: Renesas Technology Corp., Renesas LSI Design Corporation
    Inventors: Kazuo Asami, Atsuo Yamaguchi