Patents Assigned to Renesas Technology, Inc.
  • Publication number: 20060086934
    Abstract: In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.
    Type: Application
    Filed: December 5, 2005
    Publication date: April 27, 2006
    Applicant: RENESAS TECHNOLOGY, INC.
    Inventors: Toshiaki Iwamatsu, Yasuo Yamaguchi, Shigenobu Maeda, Shoichi Miyamoto, Akihiko Furukawa, Yasuo Inoue
  • Patent number: 6756267
    Abstract: A method of manufacturing a semiconductor device is provided. A polysilicon film and a rough-surfaced polysilicon film are formed on inter-layer insulating film including side and bottom surfaces of openings formed in inter-layer insulating film. A photoresist is formed on the rough-surfaced polysilicon film. The photoresist, the rough-surfaced polysilicon film and the polysilicon film that are located on the top surface of inter-layer insulating film are removed by the CMP method. The polysilicon film and rough-surfaced polysilicon film are etched in a predetermined atmosphere to make the position of the top end of storage nodes lower than the top surface of inter-layer insulating film.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: June 29, 2004
    Assignee: Renesas Technology, Inc.
    Inventors: Masahiro Shimizu, Takashi Miyajima, Toshinori Morihara