Patents Assigned to Research & Business Foundation Sungkyunkwan Univ.
  • Patent number: 11192906
    Abstract: Provided is an adduct represented by Formula 1: A.PbY2.Q??(1) wherein A is an organic or inorganic halide, Y is F?, Cl?, Br? or I? as a halogen ion, and Q is a Lewis base including a functional group containing a nitrogen (N), oxygen (O) or sulfur (S) atom with an unshared pair of electrons as an electron pair donor. The Lewis base is maintained more stable in the lead halide adduct. Therefore, the use of the adduct enables the fabrication of a perovskite solar cell with high conversion efficiency.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: December 7, 2021
    Assignees: GlobalFrontier Center for Multiscale EnergySystems, Seoul National University R&DB Foundation, Research&Business Foundation Sungkyunkwan Univ.
    Inventors: Man Soo Choi, Namyoung Ahn, Nam-Gyu Park, Dae-Yong Son, In-Hyuk Jang, Seong Min Kang
  • Patent number: 10795513
    Abstract: A capacitor structure includes: a first substrate having a first electrode part provided on one surface thereof; a second substrate having a second electrode part provided on a surface thereof, which faces the first substrate; and a dielectric layer provided between the first substrate and the second substrate, wherein a Poisson's ratio of the first substrate or the second substrate is different from a Poisson's ratio of the dielectric layer. The capacitor structure has a substantially constant capacitance even when the capacitor structure is exposed to external strain.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 6, 2020
    Assignees: Samsung Display Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIV
    Inventors: Tae Young Choi, Nae-Eung Lee
  • Patent number: 10482962
    Abstract: A ternary content addressable memory (TCAM) device includes a memory cell. The memory cell includes a data storage circuit, a limiter circuit, and a discharge circuit. The data storage circuit includes a first resistor and a second resistor connected in series to divide a voltage corresponding to search data, and configured to store cell data. The limiter circuit is configured to receive the divided voltage through an input terminal and transmit an output voltage through an output terminal based on a level of the divided voltage. The discharge circuit discharges a matching line indicating whether the stored cell data matches with the search data, based on the output voltage of the limiter circuit.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: November 19, 2019
    Assignees: SAMSUNG ELECTRONICS CO., LTD., Research & Business Foundation, Sungkyunkwan Univ.
    Inventors: Cheol Kim, Hyun-Suk Kang, Kee-Won Kwon, Rak-Joo Sung, Sung-Gi Ahn
  • Patent number: 10349228
    Abstract: A method for transmitting downlink data from a BS in a wireless communication system is disclosed. The method comprises receiving a first request signal of the downlink data from a first UE at a first timing point; transmitting packet of the downlink data to the first UE by using a unicast scheme until a multicast preparation time period passes from the first timing point; receiving a second request signal of the downlink data from a second UE at a second timing point after the first timing point; transmitting packet of the downlink data to the second UE by using the unicast scheme until the multicast preparation time period passes from the second timing point; and transmitting packet of the downlink data to a multicast group, which includes the first UE and the second UE, by using a multicast scheme when the multicast preparation time period passes.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 9, 2019
    Assignees: LG Electronics Inc., Research Business Foundation Sungkyunkwan Univ., Korea Advanced Institute of Science and Technology
    Inventors: Wan Choi, Bi Hong, Kyungrak Son, Dongin Kim, Hanbyul Seo
  • Patent number: 9927311
    Abstract: A high-sensitivity sensor containing cracks is provided. The high-sensitivity sensor is obtained by forming microcracks on a conductive thin film, which is formed on top of a support, wherein the microcracks form a micro joining structure in which the microcracks are electrically changed, short-circuited or open, thereby converting external stimuli into electric signals by generating a change in a resistance value. The high-sensitivity sensor can be useful in a displacement sensor, a pressure sensor, a vibration sensor, artificial skin, a voice recognition system, and the like.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: March 27, 2018
    Assignees: Global Frontier Center-Multiscale Energy Systems, SNU R&DB Foundation, Research & Business Foundation Sungkyunkwan Univ.
    Inventors: Daeshik Kang, Yong Whan Choi, Chanseok Lee, Kahp-Yang Suh, Tae-il Kim, Man Soo Choi
  • Patent number: RE48421
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: February 2, 2021
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim
  • Patent number: RE48422
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: February 2, 2021
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim
  • Patent number: RE49286
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: November 8, 2022
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim