Abstract: A comparator circuit with a speed control element is disclosed herein. The speed control element may include a variable voltage source and one or more transistors. Using a voltage supplied by the variable voltage source, the one or more transistors may control a swing of a clock signal to provide a swing controlled clock signal to an amplification portion of the comparator circuit. The swing controlled clock therefor may be used to control the speed of the comparator circuit (e.g., an amplification phase) based on a level of noise in the circuit. The swing controlled clock may further be used to align an output common voltage of the comparator circuit with switching voltages of downstream logic cells (e.g., inverters) connected to the comparator circuit.

Abstract: A comparator circuit with a speed control element is disclosed herein. The speed control element may include a variable voltage source and one or more transistors. Using a voltage supplied by the variable voltage source, the one or more transistors may control a swing of a clock signal to provide a swing controlled clock signal to an amplification portion of the comparator circuit. The swing controlled clock therefor may be used to control the speed of the comparator circuit (e.g., an amplification phase) based on a level of noise in the circuit. The swing controlled clock may further be used to align an output common voltage of the comparator circuit with switching voltages of downstream logic cells (e.g., inverters) connected to the comparator circuit.

Abstract: A comparator circuit with a speed control element is disclosed herein. The speed control element may include a variable voltage source and one or more transistors. Using a voltage supplied by the variable voltage source, the one or more transistors may control a swing of a clock signal to provide a swing controlled clock signal to an amplification portion of the comparator circuit. The swing controlled clock therefor may be used to control the speed of the comparator circuit (e.g., an amplification phase) based on a level of noise in the circuit. The swing controlled clock may further be used to align an output common voltage of the comparator circuit with switching voltages of downstream logic cells (e.g., inverters) connected to the comparator circuit.