Abstract: A RF switch circuit includes a voltage divider circuit and a semiconductor device. The semiconductor device has an activated state and a deactivated state. The voltage divider circuit has an input terminal connected to a first line and an output terminal connected to a second line. The first line is connected to a power source. A gate terminal of the semiconductor device is connected to the second line. In the activated state, a source terminal and a drain terminal of the semiconductor device are each selectively connected to ground. In the deactivated state, the source terminal and the drain terminal of the semiconductor device are each selectively connected to the power source.

Abstract: A front end circuit for coupling a plurality of antennas to a multi-channel time domain duplex RF transceiver is disclosed. The front end circuit has a first transmit port, a first receive chain primary port, a first receive chain secondary ports, and a first antenna port connectible to a first one of the plurality of antennas. The front end circuit also has a second transmit port, a second receive chain primary port, and a second receive chain secondary port connectible to a second one of the plurality of antennas. A first switch has terminals connected to the first transmit port, the first receive chain primary port, and the second receive chain secondary port, as well as a common terminal that is connected to the first antenna port. Additionally, the front end circuit has a second switch that has terminals connected to the second transmit port, the second receive chain primary port and the first receive chain secondary port, and a common terminal connected to the second antenna port.

Abstract: A multiport radio frequency (RF) switch circuit is disclosed. The switch circuit includes a first transistor that is connected to a first port, a common antenna port, and a first enable line. The first transistor is selectively activatable in response to a first enable signal applied to the first enable line. There is also a second transistor connected to a second port, the common antenna port, and a second enable line. The second transistor is selectively activatable in response to a second enable signal applied to the second enable line. A first inductor connected to the first port and the second port compensates for parasitic capacitance between the first port and the second port from an inactive one of the transistors.

Abstract: A directional coupler with increased directivity and reduced overall footprint area is disclosed. There is an input port, an output port, a coupled port, and a ballasting port. A primary chain of serially connected inductors is connected to the input port and the output port, while a secondary chain of serially connected inductors is connected to the coupled port and the ballasting port. A first compensation capacitor is connected to the input port and the coupled port, and a second compensation capacitor is connected to the input port and the ballasting port.

Abstract: A power amplifier architecture and front end circuits utilizing the same that connect a transceiver to an antenna are disclosed. The transceiver is configured for a specific operating frequency. An input matching segment is connected to an input port, and an output matching segment is connected to an output port. An amplifier segment includes at least one transistor with a first terminal connected to the input matching segment, a second terminal connected to the output matching segment, and a third terminal connected to a filter with a range of rejection frequencies. The filter is connected in close proximity to a first inductive interconnection tying a junction connected to the third terminal to a ground. A compensator is also connected to the input matching segment and the output matching segment to minimize instability of the filter.

Abstract: A radio frequency (RF) power amplifier circuit with spur cancellation for GSM/GPRS/EDGE transceivers is disclosed. There is a power amplifier with an RF input, an RF output, and a voltage supply input. Additionally, there is an adjustable DC-DC converter with an input connected to a battery, an output connected to the voltage supply input of the power amplifier with a DC supply voltage signal generated thereby. A spur compensator generates an error control signal responsive to spurs in the DC supply voltage signal. The error control signal is applied to the RF input of the power amplifier.

Abstract: A power amplifier architecture for connecting a radio frequency (RF) transceiver to an antenna. An input matching circuit is connected to its input port, and an output matching circuit is connected to its output port. An amplifier circuit includes at least one amplifier active device with a first terminal connected to the input matching segment and a second terminal connected to the output matching segment. A first harmonic feedback circuit is connected across the amplifier active device. Voltage components of emissions of one or more harmonic frequencies of a carrier fundamental frequency generated by the amplifier active device is fed back with opposite phase to the first terminal of the amplifier active device. A negative feedback is defined at a level correlated with a gain level of the amplifier active device at the harmonic frequencies of the carrier fundamental frequency. Negative feedback is minimized at the carrier fundamental frequency.

Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.

Abstract: A radio frequency switch circuit with improved harmonic suppression and low insertion loss has an antenna port and a plurality of signal ports. A plurality of transistor switch circuits, are connected to a respective one of the plurality of signal ports and to the antenna port. Each of the transistor switch circuits has a transistor, which in an off state, together with a harmonic suppression capacitor and a parallel inductor both connected thereto, define a tank circuit that suppresses RF signals applied to the corresponding transistor switch circuit from a different one of the transistor switch circuits. The harmonic suppression capacitor is tuned to distribute large signal voltage swings in the RF signal amongst parasitic diodes of the transistor.

Abstract: An RF power amplifier circuit is disclosed. A driver amplifier stage includes a first set of a plurality of amplifier transistors in a cascode configuration, a driver amplifier stage input, and a driver amplifier stage output. A final amplifier stage includes a second set of a plurality of amplifier transistors in a cascode configuration, a final amplifier stage input connected to the driver amplifier stage output, a final amplifier stage output, and a power supply input. An envelope signal amplifier has an input connectible to an envelope signal source, and an output capacitively coupled to the power supply input. A power converter input is connected to the power supply input to provide supplemental power to the final amplifier stage based on an envelope signal from the envelope signal source that corresponds to an input RF signal.

Abstract: A radio frequency (RF) filter circuit for rejecting one or more spurious components of an input signal has a first resonator circuit including a first capacitor and a first coupled inductor pair of a first inductor and a second inductor, and a second resonator circuit with a second capacitor and a second coupled inductor pair of a third inductor and a fourth inductor. First and second resonator coupling capacitors are connected to the first resonator circuit and the second resonator circuit. A first port and a second port are connected to the first resonator circuit and the second resonator, with the filtered signal of the input signal passed through both the first resonator circuit and the second resonator circuit being output.

Abstract: An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain.

Abstract: A directional coupler with increased directivity and reduced overall footprint area is disclosed. There is an input port, an output port, a coupled port, and a ballasting port. A primary chain of serially connected inductors is connected to the input port and the output port, while a secondary chain of serially connected inductors is connected to the coupled port and the ballasting port. A first compensation capacitor is connected to the input port and the coupled port, and a second compensation capacitor is connected to the input port and the ballasting port.

Abstract: A power amplifier architecture for connecting a radio frequency (RF) transceiver to an antenna. An input matching circuit is connected to its input port, and an output matching circuit is connected to its output port. An amplifier circuit includes at least one amplifier active device with a first terminal connected to the input matching segment and a second terminal connected to the output matching segment. A first harmonic feedback circuit is connected across the amplifier active device. Voltage components of emissions of one or more harmonic frequencies of a carrier fundamental frequency generated by the amplifier active device is fed back with opposite phase to the first terminal of the amplifier active device. A negative feedback is defined at a level correlated with a gain level of the amplifier active device at the harmonic frequencies of the carrier fundamental frequency. Negative feedback is minimized at the carrier fundamental frequency.

Abstract: A radio frequency (RF) power amplifier circuit with spur cancellation for GSM/GPRS/EDGE transceivers is disclosed. There is a power amplifier with an RF input, an RF output, and a voltage supply input. Additionally, there is an adjustable DC-DC converter with an input connected to a battery, an output connected to the voltage supply input of the power amplifier with a DC supply voltage signal generated thereby. A spur compensator generates an error control signal responsive to spurs in the DC supply voltage signal. The error control signal is applied to the RF input of the power amplifier.

Abstract: A front end circuit for selectively coupling a first antenna and a second antenna to a transmit chain and a receive chain of a radio frequency (RF) transceiver is disclosed. There is a first power amplifier having an input connectible to the transmit chain of the RF transceiver, a first low noise amplifier having an output connectible to the receive chain of the RF transceiver, and a second low noise amplifier with an input connectible to the second antenna, as well as an output connectible to the receive chain of the RF transceiver. A first matching and switch network is connected to the first antenna, the output of the first power amplifier, and the input of the first low noise amplifier. Transmit signals from the first power amplifier and receive signals from the first antenna are selectively passed to the first antenna and the first low noise amplifier.

Abstract: A power amplifier architecture and front end circuits utilizing the same that connect a transceiver to an antenna are disclosed. The transceiver is configured for a specific operating frequency. An input matching segment is connected to an input port, and an output matching segment is connected to an output port. An amplifier segment includes at least one transistor with a first terminal connected to the input matching segment, a second terminal connected to the output matching segment, and a third terminal connected to a filter with a range of rejection frequencies. The filter is connected in close proximity to a first inductive interconnection tying a junction connected to the third terminal to a ground. A compensator is also connected to the input matching segment and the output matching segment to minimize instability of the filter.

Abstract: A multiport radio frequency (RF) switch circuit is disclosed. The switch circuit includes a first transistor that is connected to a first port, a common antenna port, and a first enable line. The first transistor is selectively activatable in response to a first enable signal applied to the first enable line. There is also a second transistor connected to a second port, the common antenna port, and a second enable line. The second transistor is selectively activatable in response to a second enable signal applied to the second enable line. A first inductor connected to the first port and the second port compensates for parasitic capacitance between the first port and the second port from an inactive one of the transistors.

Abstract: A front end circuit for coupling an antenna to a radio frequency (RF) transceiver for time domain duplex systems is disclosed. The front end circuit includes an antenna port, a power amplifier, a low noise amplifier, and a matching network. The output of the power amplifier and the input of the low noise amplifier are coupled to the matching network and connected in common to the antenna. The power amplifier and the low noise amplifier are activated and deactivated in sequence corresponding to the transmit and receive modes of the transceiver, and the matching network minimizes the effect that one has on the other at the designated operating frequency.

Abstract: A front end circuit for coupling an antenna to a first radio frequency (RF) transceiver and a second RF transceiver is contemplated. The RF transceivers have a signal input, a signal output, a receive enable line and a transmit enable line. In addition to an antenna port, the front end circuit has a first power amplifier and a first low noise amplifier both coupled to first RF transceiver, and a second power amplifier and a second low noise amplifier both coupled to the second RF transceiver. The front end circuit includes a matching network that couples the power amplifiers and the low noise amplifiers, the various outputs and inputs thereof being common.