Abstract: Class D amplifiers are used for their high efficiency, but they have some undesirable characteristics that limit their useable bandwidth, one of these being the residual switching frequency ripple. Embodiments of the present invention comprise methods and apparatuses for reducing the switching frequency ripple using a technique known herein as ripple steering. The zero ripple class D amplifier is used in a hybrid system comprising a linear amplifier. The hybrid Class D amplifier is modified for extended bandwidth and lowered distortion by the addition of a linear current source feeding output capacitor. The low frequency bandwidth limit on the linear current source is matched to the high frequency bandwidth limit on the Class D current source, resulting in a composite linear/switching current source with bandwidth extended to the high frequency bandwidth limit of the linear current source.

Abstract: A apparatus and apparatus for compensating for video insertion loss due to transmission over long twisted pair cable lines is presented. Transmission of video over twisted pair cable is advantageous because of its superior cost advantage over coaxial cable. However, twisted pair cables have significant loss characteristics at the higher frequencies (i.e., broadband) compared to coaxial cables. At a transmitter station, the video signal is amplified in the high frequency region for possible skin effect losses thereby brute forcing the high frequency components to the receiving station. At the receiver station, the video signal is further compensated for diffusion line and skin effect losses. The total skin effect compensation applied in both the transmitter and receiver stations is such that the square root of frequency characteristics of skin effect losses is compensated for.

Abstract: An unshielded twisted pair (UTP) cable having a common electrical length among a plurality of twisted pairs for carrying analog signals and a different lay length and lay direction to an additional twisted pair for carrying digital signals is disclosed. The twisted pairs for carrying the analog signals may be bundled together, with the twisted pair for carrying the digital signal placed alongside the bundled pairs during the final jacketing process, during which the outer insulator is formed around all of the pairs. The bundled pairs may be used for the transmission of analog video signals (e.g., R, G and B), with the remaining pair used for transmission of digital control or digital audio signals.

Abstract: A apparatus and apparatus for compensating for video insertion loss due to transmission over long twisted pair cable lines is presented. Transmission of video over twisted pair cable is advantageous because of its superior cost advantage over coaxial cable. However, twisted pair cables have significant loss characteristics at the higher frequencies (i.e., broadband) compared to coaxial cables. At a transmitter station, the video signal is amplified in the high frequency region for possible skin effect losses thereby brute forcing the high frequency components to the receiving station. At the receiver station, the video signal is further compensated for diffusion line and skin effect losses. The total skin effect compensation applied in both the transmitter and receiver stations is such that the square root of frequency characteristics of skin effect losses is compensated for.

Abstract: An unshielded twisted pair (UTP) cable having a common electrical length among twisted pairs that carry analog signals and a different lay length and lay direction to a twisted pair that carries digital signal to minimize cross-talk from the digital signal onto the analog signals is presented. A non-conductive filler provides a central core about which the twisted pairs are wound during the bundling process and thus ensures that a minimum distance (i.e., the diameter of the core) is maintained between non-adjacent pairs of conductors for the length of the cable.

Abstract: A method and apparatus are presented for dynamically testing video equipment. A test pattern utilizes a presentation of alternating pixels and lines, along with features of the electronic video/graphics generator in which it is present to effect a close approximation to the demonstrable contrast transfer function percentage of the system or display under test. The test pattern, while depending on features of the electronic video/graphics generator for convenience of operation, may also be modified to be used as a static pattern capable of very similar utility.

Abstract: A concealable mount for connectors, such as input/output jacks or ports, is presented. The mount comprises a base with and opening for mounting to a support structure. A front panel that is movably connected to the base, is moveable between a first closed position in which the front panel extends along the front face of the base over the opening therein, and a second open position in which at least a portion of the front panel is positioned outwardly from the base. A support extends rearwardly from the front panel and is adapted to mount connectors associated with the panel. A piston arrangement is used to bias the front panel to its open position, and a latch mechanism selectively maintains the front panel in its closed position. In its closed position, the front panel conceals the connectors, and when in its open position, the front panel exposes the support and the connectors.

Abstract: A method and apparatus for detecting and correcting motion artifacts in interlaced video signal converted for progressive video display. A correction is applied where interlaced video material is determined to originate from film source, thereby having been converted to video using a process known as 3-2 pulldown. Where the video material is not a result of the 3-2 pulldown process, a check is made for the presence of “pixel motion” so that corrections may be applied to smooth out the pixel motion. To determine 3-2 pulldown or field motion, a video field is compared to the field prior to the previous field to generate field error. Field errors are generated for five consecutive fields and a local minimum error repeated every five fields indicate the origination of the video material from film source using the 3-2 pulldown process.

Abstract: This invention describes a method and apparatus for vertically locking input and output video frame rates. The output vertical sync pulse is locked in phase with the input vertical sync pulse, regardless of the input format and frequency. The output resolution, horizontal refresh rate, and delay are all user selectable. Two Phase Locked Loops are connected in series to achieve vertical lock between the input and output frames. Locking the vertical sync pulses between the input and output frames will eliminate mixing of pixels from different input frames in one output frame. The first Phase Locked Loop generates the output pixel clock required to satisfy the user's display preferences but may not precisely represent the desired output pixel clock required for frame locking because current Phase Locked Loops use integer dividers. A second Phase Locked Loop adjusts its output, which is the reference frequency to the first Phase Locked Loop, until a lock is achieved.

Abstract: This invention describes a method and apparatus for vertically locking input and output video frame rates. The output vertical sync pulse is locked in phase with the input vertical sync pulse, regardless of the input format and frequency. The output resolution, horizontal refresh rate, and delay are all user selectable. Two Phase Locked Loops are connected in series to achieve vertical lock between the input and output frames. Locking the vertical sync pulses between the input and output frames will eliminate mixing of pixels from different input frames in one output frame. The first Phase Locked Loop generates the output pixel clock required to satisfy the user's display preferences but may not precisely represent the desired output pixel clock required for frame locking because current Phase Locked Loops use integer dividers. A second Phase Locked Loop adjusts its output, which is the reference frequency to the first Phase Locked Loop, until a lock is achieved.

Abstract: This invention describes a method and apparatus for vertically locking input and output video frame rates. The output vertical sync pulse is locked in phase with the input vertical sync pulse, regardless of the input format and frequency. The output resolution, horizontal refresh rate, and delay are all user selectable. Two Phase Locked Loops are connected in series to achieve vertical lock between the input and output frames. Locking the vertical sync pulses between the input and output frames will eliminate mixing of pixels from different input frames in one output frame. The first Phase Locked Loop generates the output pixel clock required to satisfy the user's display preferences but may not precisely represent the desired output pixel clock required for frame locking because current Phase Locked Loops use integer dividers. A second Phase Locked Loop adjusts its output, which is the reference frequency to the first Phase Locked Loop, until a lock is achieved.