Abstract: A computer-implemented method for use in decoding syndromes of a quantum error correction code, the syndromes comprising measurement data from a quantum computer comprising a plurality of syndrome qubits and a plurality of data qubits.

Abstract: A decoder apparatus for decoding syndromes of a quantum error correction code, the syndromes comprising measurement data from a quantum computer, the quantum computer comprising an array of qubits including syndrome qubits and data qubits. The decoder apparatus is configured to: receive syndrome index data representative of: a physical location of each of the array of qubits within the quantum computer; and lattice dimensions of the array of qubits; receive the syndromes of the quantum error correction code from the quantum computer; determine physical co-ordinate positions for each of the array of qubits based on the syndrome index data; decode the syndromes of the quantum error correction code using the determined physical co-ordinate positions.

Abstract: A computer-implemented postselection-free method of initializing qubits in a quantum computer, comprising: preparing at least one data qubit and a plurality of auxiliary qubits in respective initial states, wherein each of the at least one data qubit and the plurality of auxiliary qubits has a respective probability of being prepared with an error; and, performing a plurality of non-measurement multi-qubit quantum logic operations that propagate errors between the at least one data qubit and the plurality of auxiliary qubits so as to reduce the probability of an error affecting the at least one data qubit.

Abstract: An apparatus for a quantum computer comprising a memory device and a converter block, the memory device comprising: a local command module; and a double-buffer-memory module comprising a plurality of pairs of memory modules, each memory module: coupled to the local command module; and configured to store a respective operation for controlling a qubit of the quantum computer; wherein the local command module is configured to: receive an instruction to provide the operation for the qubit; read the operation from a respective one of the plurality of pairs of memory modules indicated by the instruction; and provide the operation to the converter block; wherein the converter block is configured to receive the operation from the memory device and provide digital output pulses, representative of the operation, to an output interface, the output interface configured to provide the digital output pulses to a digital-to-analogue converter for controlling the qubit to perform the operation.

Abstract: A computer-implemented method of selecting a power-optimal compression scheme for transmitting digital control signals from a classical interface of a quantum computer to a quantum processing unit (QPU) of the quantum computer is disclosed. The method involves receiving static and dynamic power consumption values associated with operations performable by the QPU; determining compression schemes implementable by the QPU; calculating total power consumption values associated with receiving and decompressing a representative control signal at the QPU using the compression schemes; and selecting the compression scheme having the lowest total power consumption value. A corresponding method for transmitting control signals from a classical interface of the quantum computer to the QPU is also disclosed in which a compressed control signal is transmitted from the classical interface to the QPU with one or more delays.

Abstract: A computer-implemented method for determining a measurement value for each operator of a plurality of operators. The method comprises grouping the plurality of operators into one or more sets of mutually commuting operators, each set comprising one or more of the plurality of operators. Determining, for each set of operators: a subset of transformed operators based on the set of operators, such that the set of operators are equal to products of the subset of transformed operators; a mapping circuit based on the subset of transformed operators, wherein the mapping circuit comprises an arrangement of quantum gates configured to operate on a plurality of qubits in a quantum computer.

Abstract: An apparatus can be configured to control a quantum memory of a quantum computer. The quantum memory can have a first qubit. The apparatus can comprise: a first-classical-register; a first-clock; a first-machine-language-buffer, that stores a first-machine-language-circuit; and a first-implementer. The first-machine-language-circuit includes: a first-timestamp; a first-qubit-identifier unique to the first qubit; a first-qubit-control-instruction; and a first-protected-location of the first-classical-register. The first-implementer can be configured to: read the first-machine-language-circuit from the first-machine-language-buffer; and read a first-control-value from the first-protected-location of the first-classical-register, the first-control-value can be configured to encode either a first-execute-instruction or a first-alternate-control-instruction.

Abstract: An apparatus can be configured to control a quantum memory of a quantum computer. The quantum memory can have a first qubit. The apparatus can comprise: a first-classical-register; a first-clock; a first-machine-language-buffer, that stores a first-machine-language-circuit; and a first-implementer. The first-machine-language-circuit includes: a first-timestamp; a first-qubit-identifier unique to the first qubit; a first-qubit-control-instruction; and a first-protected-location of the first-classical-register. The first-implementer can be configured to: read the first-machine-language-circuit from the first-machine-language-buffer; and read a first-control-value from the first-protected-location of the first-classical-register, the first-control-value can be configured to encode either a first-execute-instruction or a first-alternate-control-instruction.

Abstract: A computing system can be configured to execute a classical-quantum hybrid algorithm. The computing system may comprise a classical computer comprising one or more classically-executable-nodes of the classical-quantum hybrid algorithm; and a quantum computer comprising a quantum-processor-unit. The quantum computer is operatively coupled to the classical computer. The one or more classically-executable-nodes may be configured to send a first-circuit and a second-circuit to the quantum computer for evaluation. The quantum computer may be configured to: receive the first-circuit and the second-circuit; evaluate the first-circuit, using the quantum-processor-unit, to determine a first-circuit-evaluation; and send the first-circuit-evaluation to the classical computer. The one or more classically-executable-nodes may be configured to: receive the first-circuit-evaluation; and process the first-circuit-evaluation during a first-time-interval.

Abstract: A computing system can be configured to determine a compressed quantum circuit architecture, for a quantum computer, based on a point-symmetry group of a physical system. The computing system can comprise a classical computer operatively coupled to the quantum computer. The classical computer can be configured to transmit a symmetrized-unitary operator to the quantum computer to enable configuration of the compressed quantum circuit architecture and application of the compressed quantum circuit architecture to a quantum memory containing a first quantum basis state of the physical system stored in a plurality of qubits. The first quantum basis state transforms according to a first irreducible representation of the point-symmetry group.